[HTML][HTML] Novel lockstep-based fault mitigation approach for SoCs with roll-back and roll-forward recovery

S Kasap, EW Wächter, X Zhai, S Ehsan… - Microelectronics …, 2021 - Elsevier
Abstract All-Programmable System-on-Chips (APSoCs) constitute a compelling option for
employing applications in radiation environments thanks to their high-performance …

Fault diagnosis of analog circuits based on IH-PSO optimized support vector machine

X Yuan, Z Liu, Z Miao, Z Zhao, F Zhou, Y Song - IEEE Access, 2019 - ieeexplore.ieee.org
Because of its excellent small sample learning abilities and simple network structure,
support vector machine (SVM) is widely applied in various pattern recognition fields, eg, face …

Soft error reliability evaluation of nanoscale logic circuits in the presence of multiple transient faults

S Cai, B He, W Wang, P Liu, F Yu, L Yin, B Li… - Journal of Electronic …, 2020 - Springer
Radiation-induced single transient faults (STFs) are expected to evolve into multiple
transient faults (MTFs) at nanoscale CMOS technology nodes. For this reason, the reliability …

Improving combinational circuit reliability against multiple event transients via a partition and restructuring approach

MR Rohanipoor, B Ghavami… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
Traditionally, increasing logical masking probability has been used to improve the circuit
reliability against single-event transients (SETs). As the very first work, this paper presents a …

An accurate estimation algorithm for failure probability of logic circuits using correlation separation

S Cai, B He, S Wu, J Wang, W Wang, F Yu - Journal of Electronic Testing, 2022 - Springer
As the feature size of integrated circuits decreases to the nanometer scale, process
fluctuations, aging effects, and particle radiation have an increasing influence on the Failure …

A layout-based soft error rate estimation and mitigation in the presence of multiple transient faults in combinational logic

C Georgakidis, GI Paliaroutis… - … on Quality Electronic …, 2020 - ieeexplore.ieee.org
Cosmic radiation resulting in transient faults to the combinational logic of Integrated Circuits
(ICs), constitutes a major reliability concern for space applications. In addition, continuous …

FPGA-Based Cross-Hardware MBU Emulation Platform for Layout-Level Digital VLSI

X Chen, L Huo, Y Xie, Z Shen, Z Xiang… - 2023 IEEE 32nd …, 2023 - ieeexplore.ieee.org
As the feature size of integrated circuits (ICs) continues to shrink, radiation-induced multiple
bit upsets (MBUs) become more frequent than single bit upsets (SBUs) in nanometer ICs …

[HTML][HTML] A fast simulation method for analysis of SEE in VLSI

Y Lu, X Chen, X Zhai, S Saha, S Ehsan, J Su… - Microelectronics …, 2021 - Elsevier
The transistor simulation tools (eg TCAD and SPICE) are widely used to simulate single
event effects (SEE) in industry. However, due to the variances of the physical parameters in …

Set pulse characterization and ser estimation in combinational logic with placement and multiple transient faults considerations

GI Paliaroutis, P Tsoumanis, N Evmorfopoulos… - Technologies, 2020 - mdpi.com
Integrated circuit susceptibility to radiation-induced faults remains a major reliability concern.
The continuous downscaling of device feature size and the reduction in supply voltage in …

Adaptive intelligent systems for extreme environments

Y Lu - 2023 - repository.essex.ac.uk
As embedded processors become powerful, a growing number of embedded systems
equipped with artificial intelligence (AI) algorithms have been used in radiation …