Flare: Flexible in-network allreduce
The allreduce operation is one of the most commonly used communication routines in
distributed applications. To improve its bandwidth and to reduce network traffic, this …
distributed applications. To improve its bandwidth and to reduce network traffic, this …
Roar: A router microarchitecture for in-network allreduce
R Wang, D Dong, F Lei, J Ma, K Wu, K Lu - Proceedings of the 37th …, 2023 - dl.acm.org
The allreduce operation is the most commonly used collective operation in distributed or
parallel applications. It aggregates data collected from distributed hosts and broadcasts the …
parallel applications. It aggregates data collected from distributed hosts and broadcasts the …
VRPR: A New Data Center Protocol for Enhanced Network Performance, Resilience and Recovery
MM Iqbal, MD Awan, MSH Khiyal, RA Bakar - IEEE Access, 2024 - ieeexplore.ieee.org
There is an increasing demand for high-performance data center networks with resilient
connectivity to support modern applications. Current approaches often lack robustness …
connectivity to support modern applications. Current approaches often lack robustness …
[HTML][HTML] PrismParser: A Framework for Implementing Efficient P4-Programmable Packet Parsers on FPGA
The increasing complexity of modern networks and their evolving needs demand flexible,
high-performance packet processing solutions. The P4 language excels in specifying packet …
high-performance packet processing solutions. The P4 language excels in specifying packet …
Packet Classification Using TCAM of Narrow Entries
HT Lin, WH Pan, PC Wang - Technologies, 2023 - mdpi.com
Packet classification based on rules of packet header fields is the key technology for
enabling software-defined networking (SDN). Ternary content addressable memory (TCAM) …
enabling software-defined networking (SDN). Ternary content addressable memory (TCAM) …
An Area-efficient Memory-based Architecture for P4-programmable Streaming Parsers in FPGAs
P Mashreghi-Moghadam… - … on Circuits and …, 2023 - ieeexplore.ieee.org
Moving toward software-defined networking and function virtualization, flexibility and
reconfigurability of the network have become more and more critical. Packet parsing, the first …
reconfigurability of the network have become more and more critical. Packet parsing, the first …
HyperParser: A High-Performance Parser Architecture for Next Generation Programmable Switch and SmartNIC
Programmable switches and SmartNICs motivate the programmable network. ASIC is
adopted in programmable switches to achieve high throughput, and FPGA-based SmartNIC …
adopted in programmable switches to achieve high throughput, and FPGA-based SmartNIC …
100 Gbps Dynamic Extensible Protocol Parser Based on an FPGA
K Wang, Z Guo, M Song, M Sha - Electronics, 2022 - mdpi.com
In order to facilitate the transition between networks and the integration of heterogeneous
networks, the underlying link design of the current mainstream Information-Centric …
networks, the underlying link design of the current mainstream Information-Centric …
Run-to-Completion versus Pipelined: The Case of 100 Gbps Packet Parsing
H Zolfaghari, H Mustafa, J Nurmi - 2021 IEEE 22nd International …, 2021 - ieeexplore.ieee.org
Packet parsing is the initial step in processing of network packets. It is encountered in any
environment in which packets must be processed. Examples include switches, routers …
environment in which packets must be processed. Examples include switches, routers …
FPGA Architecture for High-speed TCAM-based Packet Parsing
K Kumarasamy, D Vaithiyanathan - 2024 Fourth International …, 2024 - ieeexplore.ieee.org
Packet parsing is the first and foremost step, it is a pivotal function due to the high level of
dependencies on the process of parsing concerning the field extraction. Therefore, the …
dependencies on the process of parsing concerning the field extraction. Therefore, the …