Data center energy consumption modeling: A survey

M Dayarathna, Y Wen, R Fan - IEEE Communications surveys …, 2015 - ieeexplore.ieee.org
Data centers are critical, energy-hungry infrastructures that run large-scale Internet-based
services. Energy consumption models are pivotal in designing and optimizing energy …

A survey on compiler autotuning using machine learning

AH Ashouri, W Killian, J Cavazos, G Palermo… - ACM Computing …, 2018 - dl.acm.org
Since the mid-1990s, researchers have been trying to use machine-learning-based
approaches to solve a number of different compiler optimization problems. These …

[HTML][HTML] Estimation of energy consumption in machine learning

E García-Martín, CF Rodrigues, G Riley… - Journal of Parallel and …, 2019 - Elsevier
Energy consumption has been widely studied in the computer architecture field for decades.
While the adoption of energy as a metric in machine learning is emerging, the majority of …

ACT: Designing sustainable computer systems with an architectural carbon modeling tool

U Gupta, M Elgamal, G Hills, GY Wei, HHS Lee… - Proceedings of the 49th …, 2022 - dl.acm.org
Given the performance and efficiency optimizations realized by the computer systems and
architecture community over the last decades, the dominating source of computing's carbon …

Matraptor: A sparse-sparse matrix multiplication accelerator based on row-wise product

N Srivastava, H Jin, J Liu, D Albonesi… - 2020 53rd Annual …, 2020 - ieeexplore.ieee.org
Sparse-sparse matrix multiplication (SpGEMM) is a computation kernel widely used in
numerous application domains such as data analytics, graph processing, and scientific …

Accelergy: An architecture-level energy estimation methodology for accelerator designs

YN Wu, JS Emer, V Sze - 2019 IEEE/ACM International …, 2019 - ieeexplore.ieee.org
With Moore's law slowing down and Dennard scaling ended, energy-efficient domain-
specific accelerators, such as deep neural network (DNN) processors for machine learning …

Diannao: A small-footprint high-throughput accelerator for ubiquitous machine-learning

T Chen, Z Du, N Sun, J Wang, C Wu, Y Chen… - ACM SIGARCH …, 2014 - dl.acm.org
Machine-Learning tasks are becoming pervasive in a broad range of domains, and in a
broad range of systems (from embedded systems to data centers). At the same time, a small …

Compute caches

S Aga, S Jeloka, A Subramaniyan… - … Symposium on High …, 2017 - ieeexplore.ieee.org
This paper presents the Compute Cache architecture that enables in-place computation in
caches. Compute Caches uses emerging bit-line SRAM circuit technology to re-purpose …

PIM-enabled instructions: A low-overhead, locality-aware processing-in-memory architecture

J Ahn, S Yoo, O Mutlu, K Choi - ACM SIGARCH Computer Architecture …, 2015 - dl.acm.org
Processing-in-memory (PIM) is rapidly rising as a viable solution for the memory wall crisis,
rebounding from its unsuccessful attempts in 1990s due to practicality concerns, which are …

Graphpim: Enabling instruction-level pim offloading in graph computing frameworks

L Nai, R Hadidi, J Sim, H Kim… - … symposium on high …, 2017 - ieeexplore.ieee.org
With the emergence of data science, graph computing has become increasingly important
these days. Unfortunately, graph computing typically suffers from poor performance when …