Learning a convolutional neural network for non-uniform motion blur removal

J Sun, W Cao, Z Xu, J Ponce - Proceedings of the IEEE …, 2015 - openaccess.thecvf.com
In this paper, we address the problem of estimating and removing non-uniform motion blur
from a single blurry image. We propose a deep learning approach to predicting the …

A technical survey on delay defects in nanoscale digital VLSI circuits

P Muthukrishnan, S Sathasivam - Applied Sciences, 2022 - mdpi.com
As technology scales down, digital VLSI circuits are prone to many manufacturing defects.
These defects may result in functional and delay-related circuit failures. The number of test …

Synchronous subnanosecond clock and data recovery for optically switched data centres using clock phase caching

KA Clark, D Cletheroe, T Gerard, I Haller, K Jozwik… - Nature …, 2020 - nature.com
The rapid growth in the amount of data being transferred within data centres, combined with
the slowdown in Moore's Law, creates challenges for the future scalability of electronically …

Dynamic thermal management for FinFET-based circuits exploiting the temperature effect inversion phenomenon

W Lee, Y Wang, T Cui, S Nazarian… - Proceedings of the 2014 …, 2014 - dl.acm.org
Due to limits on the availability of the energy source in many mobile user platforms (ranging
from handheld devices to portable electronics to deeply embedded devices) and concerns …

Effect of NBTI/PBTI aging and process variations on write failures in MOSFET and FinFET flip-flops

U Khalid, A Mastrandrea, M Olivieri - Microelectronics Reliability, 2015 - Elsevier
The assessment of noise margins and the related probability of failure in digital cells has
growingly become essential, as nano-scale MOSFET and FinFET technologies are …

Robust logic circuits design using SOI shorted-gate FinFETs

SU Haq, VK Sharma - Indian Journal of Pure & Applied Physics …, 2023 - op.niscpr.res.in
The scaling of planar Metal Oxide Semiconductor Field Effect Transistor (MOSFET)
technology has reached to its extremity. Double Gate (DG) device was introduced to derive …

TEI-Turbo: Temperature effect inversion-aware turbo boost for finfet-based multi-core systems

E Cai, D Marculescu - 2015 IEEE/ACM International …, 2015 - ieeexplore.ieee.org
Energy and temperature are the main constraints for modern high-performance multi-core
systems. To save power or increase performance, Dynamic Voltage and Frequency Scaling …

Exploring aging deceleration in FinFET-based multi-core systems

E Cai, D Stamoulis… - 2016 IEEE/ACM …, 2016 - ieeexplore.ieee.org
Power and thermal issues are the main constraints for high-performance multi-core systems.
As the current technology of choice, FinFET is observed to have lower delay under higher …

TEI-power: Temperature Effect Inversion--Aware Dynamic Thermal Management

W Lee, K Han, Y Wang, T Cui, S Nazarian… - ACM Transactions on …, 2017 - dl.acm.org
FinFETs have emerged as a promising replacement for planar CMOS devices in sub-20nm
technology nodes. However, based on the temperature effect inversion (TEI) phenomenon …

Temperature effect inversion-aware power-performance optimization for FinFET-based multicore systems

E Cai, D Marculescu - … on Computer-Aided Design of Integrated …, 2017 - ieeexplore.ieee.org
Energy and temperature are the main constraints for modern high-performance multicore
systems. To save power or increase performance, dynamic voltage and frequency scaling …