Nanometre-scale electronics with III–V compound semiconductors
JA Del Alamo - Nature, 2011 - nature.com
For 50 years the exponential rise in the power of electronics has been fuelled by an increase
in the density of silicon complementary metal–oxide–semiconductor (CMOS) transistors and …
in the density of silicon complementary metal–oxide–semiconductor (CMOS) transistors and …
Recent progress on high‐capacitance polymer gate dielectrics for flexible low‐voltage transistors
B Nketia‐Yawson, YY Noh - Advanced Functional Materials, 2018 - Wiley Online Library
The gate dielectric layer is an essential element of field‐effect transistors (FETs), large area
integrated circuits, and various application electronics. Beyond basic insulation between the …
integrated circuits, and various application electronics. Beyond basic insulation between the …
Epitaxial growth of highly mismatched III-V materials on (001) silicon for electronics and optoelectronics
Monolithic integration of III-V on silicon has been a scientifically appealing concept for
decades. Notable progress has recently been made in this research area, fueled by …
decades. Notable progress has recently been made in this research area, fueled by …
Growing antiphase-domain-free GaAs thin films out of highly ordered planar nanowire arrays on exact (001) silicon
We report the use of highly ordered, dense, and regular arrays of in-plane GaAs nanowires
as building blocks to produce antiphase-domain-free GaAs thin films on exact (001) silicon …
as building blocks to produce antiphase-domain-free GaAs thin films on exact (001) silicon …
III–V/Ge channel MOS device technologies in nano CMOS era
CMOS utilizing high-mobility III–V/Ge channels on Si substrates is expected to be one of the
promising devices for high-performance and low power advanced LSIs in the future …
promising devices for high-performance and low power advanced LSIs in the future …
III–V complementary metal–oxide–semiconductor electronics on silicon substrates
One of the major challenges in further advancement of III–V electronics is to integrate high
mobility complementary transistors on the same substrate. The difficulty is due to the large …
mobility complementary transistors on the same substrate. The difficulty is due to the large …
High mobility CMOS technologies using III–V/Ge channels on Si platform
MOSFETs using channel materials with high mobility and low effective mass have been
regarded as strongly important for obtaining high current drive and low supply voltage …
regarded as strongly important for obtaining high current drive and low supply voltage …
Nucleation-controlled gold-induced-crystallization for selective formation of Ge (100) and (111) on insulator at low-temperature (∼ 250° C)
JH Park, T Suzuki, M Kurosawa, M Miyao… - Applied Physics …, 2013 - pubs.aip.org
Selective formation of Ge (100) and (111) on amorphous-insulator at low-temperatures (∼
250 C) is realized through gold-induced-crystallization using a-Ge/Au/SiO 2 stacked …
250 C) is realized through gold-induced-crystallization using a-Ge/Au/SiO 2 stacked …
Aspect ratio trapping: a unique technology for integrating Ge and III-Vs with silicon CMOS
JG Fiorenza, JS Park, J Hydrick, J Li, J Li… - ECS …, 2010 - iopscience.iop.org
This paper describes the recent development of the Aspect Ratio Trapping (ART)
heterointegration technique. This technique uses high aspect ratio sub-micron trenches to …
heterointegration technique. This technique uses high aspect ratio sub-micron trenches to …
III-V/Ge MOS device technologies for low power integrated systems
CMOS utilizing high mobility III-V/Ge channels on Si substrates is expected to be one of the
promising devices for high performance and low power integrated systems in the future …
promising devices for high performance and low power integrated systems in the future …