Mnemosyne: Lightweight persistent memory
New storage-class memory (SCM) technologies, such as phase-change memory, STT-RAM,
and memristors, promise user-level access to non-volatile storage through regular memory …
and memristors, promise user-level access to non-volatile storage through regular memory …
Grace: Safe multithreaded programming for C/C++
The shift from single to multiple core architectures means that programmers must write
concurrent, multithreaded programs in order to increase application performance …
concurrent, multithreaded programs in order to increase application performance …
Stretching transactional memory
A Dragojević, R Guerraoui, M Kapalka - ACM sigplan notices, 2009 - dl.acm.org
Transactional memory (TM) is an appealing abstraction for programming multi-core systems.
Potential target applications for TM, such as business software and video games, are likely …
Potential target applications for TM, such as business software and video games, are likely …
Time-based software transactional memory
Software transactional memory (STM) is a concurrency control mechanism that is widely
considered to be easier to use by programmers than other mechanisms such as locking. The …
considered to be easier to use by programmers than other mechanisms such as locking. The …
Laminar: Practical fine-grained decentralized information flow control
Decentralized information flow control (DIFC) is a promising model for writing programs with
powerful, end-to-end security guarantees. Current DIFC systems that run on commodity …
powerful, end-to-end security guarantees. Current DIFC systems that run on commodity …
Protecting private keys against memory disclosure attacks using hardware transactional memory
Cryptography plays an important role in computer and communication security. In practical
implementations of cryptosystems, the cryptographic keys are usually loaded into the …
implementations of cryptosystems, the cryptographic keys are usually loaded into the …
Gadara: Dynamic Deadlock Avoidance for Multithreaded Programs.
Deadlock is an increasingly pressing concern as the multicore revolution forces parallel
programming upon the average programmer. Existing approaches to deadlock impose …
programming upon the average programmer. Existing approaches to deadlock impose …
Is transactional programming actually easier?
CJ Rossbach, OS Hofmann, E Witchel - Proceedings of the 15th acm …, 2010 - dl.acm.org
Chip multi-processors (CMPs) have become ubiquitous, while tools that ease concurrent
programming have not. The promise of increased performance for all applications through …
programming have not. The promise of increased performance for all applications through …
Why STM can be more than a research toy
Why STM can be more than a research toy Page 1 70 CommuniCations oF the aCm | APRIL
2011 | vOL. 54 | nO. 4 contributed articles whILE muLTIcoRE ARchITEcTuRES are increasingly …
2011 | vOL. 54 | nO. 4 contributed articles whILE muLTIcoRE ARchITEcTuRES are increasingly …
TLRW: return of the read-write lock
D Dice, N Shavit - Proceedings of the twenty-second annual ACM …, 2010 - dl.acm.org
TL2 and similar STM algorithms deliver high scalability based on write-locking and invisible
readers. In fact, no modern STM design locks to read along its common execution path …
readers. In fact, no modern STM design locks to read along its common execution path …