Analysis, modeling and optimization of transmission gate delay

SA Mondal, S Talapatra… - 2011 3rd Asia Symposium …, 2011 - ieeexplore.ieee.org
Due to relatively constant and low resistive path between input and output, Transmission
gate (TG) logic offers less delay compared to other logic styles without threshold drop while …

[PDF][PDF] Adiabatic Digital Circuits Based on Sub-threshold Operation of Pass-transistor and Slowly Ramping Signals

A Pajkanovic, TJ Kazmierski… - Proceedings of Small …, 2012 - researchgate.net
An overview of pass-transistor logic and subthreshold operation of transistors is given in this
paper. Benefits of combining these two design principles from overall energy consumption …

[PDF][PDF] Performance Comparison of Static CMOS and Domino Logic Style in VLSI Design: A Review

SM Ramesh, TVP Sundararajan, MJC Prasad… - core.ac.uk
Of late, there is a steep rise in the usage of handheld gadgets and high speed applications.
VLSI designers often choose static CMOS logic style for low power applications. This logic …

[引用][C] Logical Level Capacitance and Power Modeling for Digital Logic Gates using Pass Transistor Logic

N Shivaram Venkatesh, S Singhal, N Babu, R Singh

[引用][C] Technical Summary

VM SRIVASTAVA