Normally-off GaN-on-Si MISFET using PECVD SiON gate dielectric
We have developed a silicon oxynitride (SiON) deposition process using a plasma-
enhanced chemical vapor deposition system for the gate dielectric of GaN-on-Si metal …
enhanced chemical vapor deposition system for the gate dielectric of GaN-on-Si metal …
[PDF][PDF] Modelling and simulation of normally-off AlGaN/GaN MOS-HEMTs
The article presents the results of modelling and simulation of normally-off AlGaN/GaN MOS-
HEMT transistors. The effect of the resistivity of the GaN: C layer, the channel mobility and …
HEMT transistors. The effect of the resistivity of the GaN: C layer, the channel mobility and …
Enhancement-mode GaN-on-Silicon MOS-HEMT using pure wet etch technique
C Tang, G Xie, K Sheng - 2015 IEEE 27th International …, 2015 - ieeexplore.ieee.org
This paper reports for the first time a gate-recessed GaN-on-Silicon MOS-HEMT device with
true normally-off operation and high breakdown voltage using a one step simultaneous …
true normally-off operation and high breakdown voltage using a one step simultaneous …
CMOS-compatible ehancement-mode GaN-on-Si MOS-HEMT with high breakdown voltage (930V) using thermal oxidation and TMAH wet etching
C Tang, M Hou, X Li, G Xie… - 2015 IEEE Energy …, 2015 - ieeexplore.ieee.org
In this paper, we report for the first time, an enhancement-mode (E-mode) Al 2 O 3/GaN
metal-oxide-semiconductor high-electron-mobility-transistor (MOS-HEMT) using CMOS …
metal-oxide-semiconductor high-electron-mobility-transistor (MOS-HEMT) using CMOS …
Performance improvement and better scalability of wet-recessed and wet-oxidized AlGaN/GaN high electron mobility transistors
We have demonstrated that a thin layer of Al 2 O 3 grown by wet-oxidation of wet-recessed
AlGaN barrier layer in an AlGaN/GaN heterostructure can significantly improve the …
AlGaN barrier layer in an AlGaN/GaN heterostructure can significantly improve the …
Optimalizace výkonových MOSFET součástek vhodných pro integrované obvody
P Vacula - 2019 - search.proquest.com
This doctoral thesis deals with the design of lateral power transistor with lower specific on-
resistance for integration into IC. The new model of MOSFET with waffle gate pattern is there …
resistance for integration into IC. The new model of MOSFET with waffle gate pattern is there …