Recent progress of integrated circuits and optoelectronic chips

Y Hao, S Xiang, G Han, J Zhang, X Ma, Z Zhu… - Science China …, 2021 - Springer
Integrated circuits (ICs) and optoelectronic chips are the foundation stones of the modern
information society. The IC industry has been driven by the so-called “Moore's law” in the …

Large dispersive interaction between a CMOS double quantum dot and microwave photons

DJ Ibberson, T Lundberg, JA Haigh, L Hutin, B Bertrand… - PRX Quantum, 2021 - APS
We report fast charge-state readout of a double quantum dot in a CMOS split-gate silicon
nanowire transistor via the large dispersive interaction with microwave photons in a lumped …

Low charge noise quantum dots with industrial CMOS manufacturing

A Elsayed, M Shehata, C Godfrin, S Kubicek… - arXiv preprint arXiv …, 2022 - arxiv.org
Silicon spin qubits are among the most promising candidates for large scale quantum
computers, due to their excellent coherence and compatibility with CMOS technology for …

Single-electron operation of a silicon-CMOS 2× 2 quantum dot array with integrated charge sensing

W Gilbert, A Saraiva, WH Lim, CH Yang, A Laucht… - Nano Letters, 2020 - ACS Publications
The advanced nanoscale integration available in CMOS technology provides a key
motivation for its use in spin-based quantum computing applications. Initial demonstrations …

Cryogenic transport characteristics of P-type gate-all-around silicon nanowire MOSFETs

J Gu, Q Zhang, Z Wu, J Yao, Z Zhang, X Zhu, G Wang… - Nanomaterials, 2021 - mdpi.com
A 16-nm-Lg p-type Gate-all-around (GAA) silicon nanowire (Si NW) metal oxide
semiconductor field effect transistor (MOSFET) was fabricated based on the mainstream bulk …

[HTML][HTML] Enhancing electrostatic coupling in silicon quantum dot array by dual gate oxide thickness for large-scale integration

N Lee, R Tsuchiya, G Shinkai, Y Kanno, T Mine… - Applied Physics …, 2020 - pubs.aip.org
We propose a structure with word/bit line control for a two-dimensional quantum dot array,
which allows random access for arbitrary quantum dots with a small number of control …

Quantum-Dot-Based Thermometry Using 12-nm FinFET and Machine Learning Models

SK Singh, D Sharma, P Srinivasan… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
In this work, we demonstrate the use of a bulk FinFET designed in a 12-nm CMOS
technology node, as a quantum dot (QD)-based thermometer at cryogenic temperatures …

Characterization and modeling of quantum dot behavior in FDSOI devices

SP Tripathi, S Bonen, A Bharadwaj… - IEEE Journal of the …, 2022 - ieeexplore.ieee.org
A compact analytical model is proposed along with a parameter extraction methodology to
accurately capture the steady-state (DC) sequential tunneling current observed in the …

Germanium quantum-dot array with self-aligned electrodes for quantum electronic devices

IH Wang, PY Hong, KP Peng, HC Lin, T George, PW Li - Nanomaterials, 2021 - mdpi.com
Semiconductor-based quantum registers require scalable quantum-dots (QDs) to be
accurately located in close proximity to and independently addressable by external …

Linking room-and low-temperature electrical performance of MOS gate stacks for cryogenic applications

KH Kao, C Godfrin, A Elsayed, R Li… - IEEE Electron …, 2022 - ieeexplore.ieee.org
Based on MOSFETs with four different gate stacks, we extract the oxide trap density and
transconductance from the low frequency noise and DC transfer characteristics at room …