Systems-on-Chip's (SoC) design complexity demands a high-performance linear regulator
architecture to maintain a stable operation for the efficient power management of today's …

Recent years have witnessed growing interest in the use of artificial neural networks (ANNs)
for vision, classification, and inference problems. An artificial neuron sums N weighted …

Emerging nonvolatile resistive memory technologies can be potentially suitable for
computationally expensive analog pattern-matching tasks. However, the use of CMOS …

This paper presents a CMOS low quiescent current output-capacitorless low-dropout
regulator (LDO) based on a high slew rate current mode transconductance amplifier (CTA) …

A low quiescent current output-capacitorless CMOS LDO regulator based on a high slew-
rate current-mode transconductance amplifier (CTA) as an error amplifier is presented. Load …

A high voltage, external capacitor-less low-dropout regulator (HVLDO) with transient
enhancement loop is presented in this work. The proposed HVLDO is designed with high …

A flipped voltage follower structure based on a dynamic current boosting technique is
proposed which enables the fast-transient behavior. It is applied to an output capacitor-less …

In this paper, a full-on chip low drop-Out voltage regulator (LDO) with a simple Slew-Rate
Enhancement Circuit (SREC) has been proposed and simulated in TSMC 0.18 μm CMOS …

A low drop-out (LDO) voltage regulator with high power supply rejection ratio (PSRR) and
enhanced transient response is presented in this study. The proposed idea is to apply a …

In this paper we present an LDO based on an error amplifier. The designed error amplifier
has a gain of 89.93 dB at low frequencies. This amplifier's Bandwidth is 50.8 MHz and its …