Storage devices, memory systems and operating methods to suppress operating errors due to variations in environmental conditions
W Chung, S HanShin - US Patent 10,019,188, 2018 - Google Patents
In a method for operating a NAND flash memory system, a temperature sensing device
detects a decrease in temperature of the NAND flash memory system below a first threshold …
detects a decrease in temperature of the NAND flash memory system below a first threshold …
Recovery from cross-temperature read failures by programming neighbor word lines
A Shappir, M Neerman, O Shapira - US Patent 9,928,126, 2018 - Google Patents
A memory system includes an interface and storage circuitry. The interface is configured to
communicate with memory cells that store data. The storage circuitry is configured to …
communicate with memory cells that store data. The storage circuitry is configured to …
Thermal throttling for memory devices
NN Yang, D Vaysman, E Erez, G Shah - US Patent 11,016,545, 2021 - Google Patents
The present disclosure discloses a memory device including a control system for thermal
throttling. The control system acquires the temperature of a non-volatile memory element …
throttling. The control system acquires the temperature of a non-volatile memory element …
Non-volatile memory with intelligent temperature sensing and local throttling
NN Yang, G Shah, P Reusswig, D Vaysman - US Patent 9,811,267, 2017 - Google Patents
A non-volatile storage apparatus comprises a controller, one or more memory packages, a
system temperature sensor, and one or more memory temperature sensors. The system …
system temperature sensor, and one or more memory temperature sensors. The system …
Program temperature aware data scrub
G Shah, PD Reusswig, CNY Yip, NN Yang - US Patent 10,026,483, 2018 - Google Patents
Techniques disclosed herein cope with cross-temperature effects in non-volatile memory
systems. One technology disclosed herein includes an apparatus and method that scrubs a …
systems. One technology disclosed herein includes an apparatus and method that scrubs a …
Non-volatile memory devices having temperature and location dependent word line operating voltages
J Kim, IH Park, SH Park - US Patent 10,176,881, 2019 - Google Patents
A non-volatile memory device includes: a memory cell array including a memory cell string
including a ground selection transistor and a plurality of serially connected non-volatile …
including a ground selection transistor and a plurality of serially connected non-volatile …
Single pulse SLC programming scheme
MV Dunga, P Dak, P Shukla - US Patent 10,541,031, 2020 - Google Patents
(57) ABSTRACT A program circuit may two-dimensionally program data into cells by
applying different selected bit line or channel voltages to different bit lines or channels …
applying different selected bit line or channel voltages to different bit lines or channels …
Throughput performance for cross temperature handling scenarios
A Thalaimalaivanaraj, S Tenugu… - US Patent …, 2020 - Google Patents
(57) ABSTRACT A die includes a plurality of memory cells. The die also includes a
calculation circuit configured to determine a difference between a write temperature and a …
calculation circuit configured to determine a difference between a write temperature and a …
Semiconductor device and operating method thereof
JH Lee, DUN Kim - US Patent 10,297,299, 2019 - Google Patents
A semiconductor memory device may include a memory cell array. The semiconductor
memory device may include a peripheral circuit coupled to the memory cell array through …
memory device may include a peripheral circuit coupled to the memory cell array through …