A review of recent research on heat transfer in three-dimensional integrated circuits (3-D ICs)
Three-dimensional integrated circuits (3-D IC) technology has emerged in the past few
decades, driven in part by the techno-economic difficulties of dimensional scaling and the …
decades, driven in part by the techno-economic difficulties of dimensional scaling and the …
Emerging monolithic 3D integration: Opportunities and challenges from the computer system perspective
In the past decade, monolithic three dimensional integrated circuits (M3D-ICs) advance fast
and demonstrate several important breakthroughs in the fabrication process and circuit level …
and demonstrate several important breakthroughs in the fabrication process and circuit level …
Shrunk-2-D: A physical design methodology to build commercial-quality monolithic 3-D ICs
Monolithic 3-D (M3D) integrated circuits (ICs) are an emerging technology that offer much
higher integration densities than previous 3-D IC approaches. In this paper, we present a …
higher integration densities than previous 3-D IC approaches. In this paper, we present a …
Compact-2D: A physical design methodology to build two-tier gate-level 3-D ICs
The recent advancement of wafer bonding and monolithic integration technology offers fine-
grained 3-D interconnections to face-to-face (F2F) and monolithic 3-D (M3D) ICs. In this …
grained 3-D interconnections to face-to-face (F2F) and monolithic 3-D (M3D) ICs. In this …
An overview of thermal challenges and opportunities for monolithic 3D ICs
Monolithic 3D (Mono3D) is a three-dimensional integration technology that can overcome
some of the fundamental limitations faced by traditional, two-dimensional scaling. This paper …
some of the fundamental limitations faced by traditional, two-dimensional scaling. This paper …
Design challenges and solutions for ultra-high-density monolithic 3D ICs
Monolithic 3D ICs (M3D) are an emerging technology that offers an ultra-high-density 3D
integration due to the extremely small size of monolithic inter-tier vias. We explore various …
integration due to the extremely small size of monolithic inter-tier vias. We explore various …
Snap-3D: A constrained placement-driven physical design methodology for face-to-face-bonded 3D ICs
3D integration technology is one of the leading options that can advance Moore's Law
beyond conventional scaling. Due to the absence of commercial 3D placers and routers …
beyond conventional scaling. Due to the absence of commercial 3D placers and routers …
Full chip impact study of power delivery network designs in monolithic 3D ICs
In this paper, we present a comprehensive study on the impact of power delivery network
(PDN) on full-chip wirelength, routability, power, and thermal effects in monolithic 3D ICs …
(PDN) on full-chip wirelength, routability, power, and thermal effects in monolithic 3D ICs …
Monolithic 3D: an alternative to advanced CMOS scaling, technology perspectives and associated design methodology challenges
P Vivet, S Thuriès, O Billoint, S Choisnet… - 2018 25th IEEE …, 2018 - ieeexplore.ieee.org
Monolithic 3D technology (M3D) is a promising alternative to takle the loss of Moore's Law
scaling beyond 22 nm node. By stacking different circuit layers thanks to nano-scale 3D …
scaling beyond 22 nm node. By stacking different circuit layers thanks to nano-scale 3D …
A machine learning-powered tier partitioning methodology for monolithic 3-D ICs
Tier partitioning is one of the most critical stages in monolithic 3-D (M3D) integrated circuits
(ICs) implementation flows. It transforms 2-D netlists into 3-D by performing tier assignment …
(ICs) implementation flows. It transforms 2-D netlists into 3-D by performing tier assignment …