A 45 nm resilient microprocessor core for dynamic variation tolerance

KA Bowman, JW Tschanz, SLL Lu… - IEEE Journal of Solid …, 2010 - ieeexplore.ieee.org
A 45 nm microprocessor core integrates resilient error-detection and recovery circuits to
mitigate the clock frequency (F CLK) guardbands for dynamic parameter variations to …

Postsilicon voltage guard-band reduction in a 22 nm graphics execution core using adaptive voltage scaling and dynamic power gating

M Cho, ST Kim, C Tokunaga… - IEEE Journal of Solid …, 2016 - ieeexplore.ieee.org
In high volume manufacturing, conventional approach to deal with inverse-temperature
dependence (ITD) and aging is to add a post silicon flat voltage guard band to all dies based …

Adaptive and resilient circuits: A tutorial on improving processor performance, energy efficiency, and yield via dynamic variation

KA Bowman - IEEE Solid-State Circuits Magazine, 2018 - ieeexplore.ieee.org
Variability in device, circuit, and system parameters is one of the primary challenges in the
semiconductor industry. Parameter variations degrade processor performance, energy …

AUDIT: Stress testing the automatic way

Y Kim, LK John, S Pant, S Manne… - 2012 45th Annual …, 2012 - ieeexplore.ieee.org
Sudden variations in current (large di/dt) can lead to significant power supply voltage droops
and timing errors in modern microprocessors. Several papers discuss the complexity …

A 16 nm all-digital auto-calibrating adaptive clock distribution for supply voltage droop tolerance across a wide operating range

KA Bowman, S Raina, JT Bridges… - IEEE Journal of Solid …, 2015 - ieeexplore.ieee.org
A 16 nm all-digital auto-calibrating adaptive clock distribution (ACD) enhances processor
core performance and energy efficiency by mitigating the adverse effects of high-frequency …

Booster: Reactive core acceleration for mitigating the effects of process variation and application imbalance in low-voltage chips

TN Miller, X Pan, R Thomas… - … Symposium on High …, 2012 - ieeexplore.ieee.org
Lowering supply voltage is one of the most effective techniques for reducing microprocessor
power consumption. Unfortunately, at low voltages, chips are very sensitive to process …

Westmere: A family of 32nm IA processors

NA Kurd, S Bhamidipati, C Mozak… - … Solid-State Circuits …, 2010 - ieeexplore.ieee.org
Westmere is a family of next-generation IA processors for mobile, desktop and server
segments on a second-generation high-¿ metalgate 32 nm process offering increased core …

5.6 adaptive clocking system for improved power efficiency in a 28nm x86-64 microprocessor

A Grenat, S Pant, R Rachala… - 2014 IEEE International …, 2014 - ieeexplore.ieee.org
In high-performance microprocessor cores, the on-die supply voltage seen by the transistors
is non-ideal and exhibits significant fluctuations. These supply fluctuations are caused by …

A 22 nm all-digital dynamically adaptive clock distribution for supply voltage droop tolerance

KA Bowman, C Tokunaga, T Karnik… - IEEE Journal of Solid …, 2013 - ieeexplore.ieee.org
An all-digital dynamically adaptive clock distribution mitigates the impact of high-frequency
supply voltage (V CC) droops on microprocessor performance and energy efficiency. The …

Scheduling framework for distributed intrusion detection systems over heterogeneous network architectures

JF Colom, D Gil, H Mora, B Volckaert… - Journal of Network and …, 2018 - Elsevier
The evolving trends of mobility, cloud computing and collaboration have blurred the
perimeter separating corporate networks from the wider world. These new tools and …