Power efficient design of adiabatic approach for low power VLSI circuits

A Parveen, TT Selvi - 2019 Fifth International Conference on …, 2019 - ieeexplore.ieee.org
In Today's scenario the use of adiabatic approach in electronic circuit is to minimize the
power consumption in order to obtain low power VLSI circuits. There are different types of …

Performance Comparison of Full Adder Design using Different Adiabatic Logic Techniques

B Jyothi, BVR Reddy, M Kumar - 2023 10th International …, 2023 - ieeexplore.ieee.org
In arithmetic logic units (ALUs), one-bit full adder cells are the most widely used digital circuit
elements. Arithmetic operations are performed using FA. They are also the core functionality …

Designing of Adiabatic Approach for Power Efficient Full Adder Circuits

M Vignesh, B Paulchamy, J Jaya - 2021 Second International …, 2021 - ieeexplore.ieee.org
In the recent development of VLSI technologies, the most important difficult case is
complexity in power dissipation and heat removal process due to the increasing number of …

Power Efficiency Analysis of Low-Power Circuit Design Techniques in 90-nm CMOS Technology

YS Kumar, T Samant… - Advanced VLSI Design …, 2020 - taylorfrancis.com
The rising demand for low-power very large-scale integration (VLSI) can be talked at
different design levels, such as the architectural, circuit, layout, and the process technology …