<? Pub Dtl=""?> Series stacking of multiple devices is a promising technique that can help
overcome some of the fundamental limitations of CMOS technology in order to improve the …

A high-efficiency, large output-power, mm-wave digital transmitter architecture is proposed
for high data rate m-ary QAM transmission. Because it operates entirely in digital mode …

In this paper, we report a fully integrated power amplifier (PA) architecture that combines the
power of 16 on-chip PAs using a 16-way zero-degree combiner to achieve an output power …

An ultra-broadband I/Q RF-DAC digital wireless transmitter architecture is proposed for 5G
terminals and base stations. Broadband 1-32-GHz and tuned 20-32-GHz 2× 6-bit versions of …

Switching-class PAs employing device-stacking have been recently explored to meet the
challenge of efficient power amplification at mmWave frequencies at moderate power levels …

A novel stacked FET digital-to-RF converter is implemented in 45-nm SOI CMOS, which
shares DC current through an I/Q digital-to-analog converter (DAC), I/Q mixer, and stacked …

High speed, mm-Wave silicon transceivers with" Watt-level" output power have become
necessary in recent years to support multi Gb/s communication protocols over realistic data …

This paper reports 45-GHz power amplifier (PA) arrays implemented in 45-nm CMOS silicon-
on-insulator, coupled to antenna arrays to enable free-space power combining. A single …

Design equations and performance limits of stacked Class-E power amplifiers at mm-waves,
including the limitations imposed by device parasitics, are presented in this paper. As a …

This paper describes an 8-way in-phase current combining power amplifier (PA) for Ka-band
applications implemented in a 0.25 um SiGe: C BiCMOS technology. The PA achieves a …