Hardware design of parallel interleaver architectures: A survey
C Chavet, AH Sani, P Coussy - Advanced Hardware Design for Error …, 2014 - Springer
Turbo-codes and low density parity check codes (LDPC) decoders benefit from parallel
hardware architectures to meet the requirements in high data rate of modern applications …
hardware architectures to meet the requirements in high data rate of modern applications …