US PATENT DOCUMENTS achieves higher performance in applications by allowing more
powerful, tightly-coupled instruction set extensions to be implemented in reconfigurable …

BACKGROUND In a computing architecture utilizing stack-based memory allocation, stacks
may reference regions within a memory where data is added/removed in a last-in-first-out (" …

Apparatus and methods for integrated circuit (IC) design, including management of the
configuration, design param eters, and functionality of a design in which custom instruc tions …

5,361,373 A 11/1994 Gilson........................ 395/800 HAL and the Con? gurable Processoh
Since the user is not 5,544,067 A 8/1996 Rostoker et al. 364/489 required to manually Write …

(21) Appl. No.: 09/506,502 1-1. A system for generating processor hardware Supports a (22)
Filed: Feb. 17, 2000 language for significant extensions to the processor instruc (51) Int. Cl …

5,361,373 A 11/1994 Gilson 5,404,319 A 4/1995 Smith et al................... 716/18 5,450,586 A
9/1995 Kuzara et al. 5,491,640 A 2/1996 Sharma et al. 5,493,508 A 2/1996 Dangelo et al …

An automated processor design tool uses a description of customized processor instruction
set extensions in a standardized language to develop a configurable definition of a target …

The present invention is directed to Systems and tech niques for designing programmable
processing elements Such as microprocessors and the like. More particularly, the invention …

(57) ABSTRACT A method of managing the configuration, design parameters, and
functionality of an integrated circuit (IC) design using a hardware description language …

System and method for generating hardware accelerators and processor offloads. System
for hardware acceleration. Sys tem and method for implementing an asynchronous offload …