Integrated circuit chip using top post-passivation technology and bottom structure technology
M Lin, J Lee, H Lo, P Yang, T Liu - US Patent 8,456,856, 2013 - freepatentsonline.com
Integrated circuit chips and chip packages are disclosed that include an over-passivation
scheme at a top of the integrated circuit chip and a bottom scheme at a bottom of the …
scheme at a top of the integrated circuit chip and a bottom scheme at a bottom of the …
High frequency chip packages with connecting elements
M Beroz, M Warner, L Smith, G Urbish, TG Kang… - US Patent …, 2007 - Google Patents
(60) Provisional application No. 60/462,170, filed on Apr. as a lead frame incorporating a
large thermally-conductive 11, 2003, provisional application No. 60/449,673, plate and …
large thermally-conductive 11, 2003, provisional application No. 60/449,673, plate and …
Microelectronic assemblies
B Haba - US Patent 11,462,419, 2022 - Google Patents
Various embodiments of fanout packages are disclosed. A method of forming a
microelectronic assembly is disclosed. The method can include bonding a first surface of at …
microelectronic assembly is disclosed. The method can include bonding a first surface of at …
Multilevel semiconductor device and structure with memory
Z Or-Bach, JW Han - US Patent 10,515,981, 2019 - Google Patents
US10515981B2 - Multilevel semiconductor device and structure with memory - Google
Patents US10515981B2 - Multilevel semiconductor device and structure with memory …
Patents US10515981B2 - Multilevel semiconductor device and structure with memory …
Stackable circuit structures and methods of fabrication thereof
JE Kohl, CW Eichelberger - US Patent 8,169,065, 2012 - Google Patents
Stackable circuit structures and methods of fabrication are provided employing first level
metallization directly on a chips-first layer (s), which includes: a chip (s), each with a pad …
metallization directly on a chips-first layer (s), which includes: a chip (s), each with a pad …
High-frequency chip packages
M Warner, L Smith, B Haba, G Urbish, M Beroz… - US Patent …, 2007 - Google Patents
(63) Contmuatlon-m-part of appl1cat1on No. 10/210,160, Krumholz & Memlik, LLp? led on
Aug. 1, 2002, noW Pat. No. 6,856,007, and a continuation-in-part of application No …
Aug. 1, 2002, noW Pat. No. 6,856,007, and a continuation-in-part of application No …
Semiconductor system and device
Z Or-Bach, D Sekar, B Cronquist, Z Wurman - US Patent 9,219,005, 2015 - Google Patents
US9219005B2 - Semiconductor system and device - Google Patents US9219005B2 -
Semiconductor system and device - Google Patents Semiconductor system and device …
Semiconductor system and device - Google Patents Semiconductor system and device …
Integrated circuit device and structure
Z Or-Bach, DC Sekar, B Cronquist - US Patent 9,099,526, 2015 - Google Patents
US9099526B2 - Integrated circuit device and structure - Google Patents US9099526B2 -
Integrated circuit device and structure - Google Patents Integrated circuit device and structure …
Integrated circuit device and structure - Google Patents Integrated circuit device and structure …
Wafer level chip packaging
G Humpston, MJ Nystrom, V Oganesian… - US Patent …, 2011 - Google Patents
Packaged microelectronic elements are provided. In an exem plary embodiment, a
microelectronic element having a front face and a plurality of peripheral edges bounding the …
microelectronic element having a front face and a plurality of peripheral edges bounding the …
3D semiconductor device and structure
Z Or-Bach, B Cronquist - US Patent 10,840,239, 2020 - Google Patents
H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state
components formed in or on a common substrate including semiconductor components …
components formed in or on a common substrate including semiconductor components …