(57) ABSTRACT A cell circuit and corresponding layout is disclosed to include linear-
shaped diffusion fins defined to extend over a Substrate in a first direction so as to extend …

H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state
components formed in or on a common substrate including semiconductor components …

(57) ABSTRACT A restricted layout region includes a diffusion level layout including a
number of diffusion region layout shapes that de? ne at least one p-type diffusion region and …

(57) ABSTRACT A semiconductor device includes a Substrate portion that includes a
plurality of diffusion regions that include at least one p-type diffusion region and at least one …

First and second virtual grates are defined as respective sets of parallel virtual lines
extending across a layout area in first and second perpendicular directions, respectively …

A layout of a cell of a semiconductor device is disclosed to include a diffusion level layout
including a plurality of diffu sion region layout shapes, including a p-type and an n-type …

H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state
components formed in or on a common substrate including semiconductor components …

H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state
components formed in or on a common substrate including semiconductor components …

A semiconductor chip is defined to include a logic block area having a first chip level in
which layout features are placed according to a first virtual grate, and a second chip level in …

(57) ABSTRACT A semiconductor device includes a substrate portion having a plurality of
diffusion regions de? ned therein in a non-sym metrical manner relative to a virtual line de …