Smart Switching Network based Asynchronous Binary Search ADC
This paper presents a binary search analog to digital converter based on sub-ADC scheme
in which the 16-bit architecture is split into four stages and the whole architecture uses only …
in which the 16-bit architecture is split into four stages and the whole architecture uses only …
A 4 bit highly energy and area efficient SC SAR ADC based on a combinational technique with reduced reset energy
P Ghoshal, C Dey, SK Sen - Microsystem Technologies, 2020 - Springer
A combinational method, based on hybrid and junction splitting techniques, is used to
realize a 4 bit high energy efficient SC SAR ADC. The hybrid switching scheme is very …
realize a 4 bit high energy efficient SC SAR ADC. The hybrid switching scheme is very …
A 4 bit combinational hybrid-junction splitting technique for realization of an energy efficient SC SAR ADC
P Ghoshal, C Dey, SK Sen - 2019 International Conference on …, 2019 - ieeexplore.ieee.org
A novel technique that combines the advantageous features of hybrid and junction splitting
technique is presented for realization of a very high energy efficient SC SAR ADC. The …
technique is presented for realization of a very high energy efficient SC SAR ADC. The …
Realization of an ultra low power and area efficient SC SAR ADC architecture using single and two step reset methods
P Ghoshal, C Dey, SK Sen - Microsystem Technologies, 2021 - Springer
An energy and area efficient switching scheme for a 4-bit charge redistribution switch
capacitor (SC) successive approximation register (SAR) analog-to-digital converter (ADC) is …
capacitor (SC) successive approximation register (SAR) analog-to-digital converter (ADC) is …
A 6.22 pJ/conv-step Split Design and Subtractor Based Binary Search ADC
This paper presents the design of 8-bit asynchronous based binary search analog to digital
converter (ADC) using split design topology. In the proposed work, the 8 bits had been …
converter (ADC) using split design topology. In the proposed work, the 8 bits had been …
A Low Energy and Area Efficient Switching Scheme for a Charge Redistribution SAR ADC Architecture
P Ghoshal, C Dey, SK Sen - Advances in Smart Communication …, 2021 - Springer
An energy and area efficient switching scheme for a 4-bit charge redistribution switch
capacitor (SC) successive approximation register (SAR) analog-to-digital converter (ADC) is …
capacitor (SC) successive approximation register (SAR) analog-to-digital converter (ADC) is …