Analog multipliers-based double output voltage phase detector for low-frequency demodulation of frequency modulated signals
This work deals with the design of a simple double output voltage phase detector, using a
specific type of analog multiplier, and its application in a frequency demodulator. The design …
specific type of analog multiplier, and its application in a frequency demodulator. The design …
A new strategy to design low power translinear based CMOS analog multiplier
This paper deals with a new method to design CMOS analog multiplier which operates in
four quadrants. The main core of the proposed multiplier circuit consists of two common …
four quadrants. The main core of the proposed multiplier circuit consists of two common …
DTMOS based high bandwidth four-quadrant analog multiplier
Analog multiplication circuits are very important block structures which are widely used in
analog signal applications. In analog multiplication circuits, low power consumption is …
analog signal applications. In analog multiplication circuits, low power consumption is …
DTMOS Based Squarer Circuit and Its Application in Controllable Gaussian Function Generator
DTMOS based squarer circuit used in designing of controllable Gaussian function generator
(GFG) is presented in this paper. The GFG circuit designed using the proposed squarer …
(GFG) is presented in this paper. The GFG circuit designed using the proposed squarer …
Exploration of a Low-power CMOS Voltage Squarer
VO Costa, AL Aita, AJ Cardoso… - 2021 34th SBC …, 2021 - ieeexplore.ieee.org
This paper addresses a reported voltage multiplier and explores its use as a voltage squarer
with the aim of reducing the power consumption and area. The proposed circuit can operate …
with the aim of reducing the power consumption and area. The proposed circuit can operate …
A Low Power CMOS Analog Multiplier using Regulated Cascode Current Mirror based on Translinear principle
B Pruthwiraj, AK Mishra… - 2022 IEEE 3rd Global …, 2022 - ieeexplore.ieee.org
This study discusses a new method for designing four-quadrant CMOS analog multipliers.
The suggested multiplier circuit's main core is made up of cascode current mirror, there are …
The suggested multiplier circuit's main core is made up of cascode current mirror, there are …