Circuit-level techniques for logic and memory blocks in approximate computing systemsx

S Amanollahi, M Kamal, A Afzali-Kusha… - Proceedings of the …, 2020 - ieeexplore.ieee.org
This article presents an overview of circuit-level techniques used for approximate computing
(AC), including both computation and data storage units. After providing some background …

A quality-aware voltage overscaling framework to improve the energy efficiency and lifetime of TPUs based on statistical error modeling

A Senobari, J Vafaei, O Akbari, C Hochberger… - IEEE …, 2024 - ieeexplore.ieee.org
Deep neural networks (DNNs) are a type of artificial intelligence models that are inspired by
the structure and function of the human brain, designed to process and learn from large …

Design exploration of energy-efficient accuracy-configurable dadda multipliers with improved lifetime based on voltage overscaling

H Afzali-Kusha, M Vaeztourshizi… - … Transactions on Very …, 2020 - ieeexplore.ieee.org
This article investigates an energy-efficient accuracy-configurable Dadda (X-Dadda)
multiplier. The structure employs the voltage overscaling and approximate width setting as …

X-nvdla: Runtime accuracy configurable nvdla based on applying voltage overscaling to computing and memory units

H Afzali-Kusha, M Pedram - … on Circuits and Systems I: Regular …, 2023 - ieeexplore.ieee.org
This paper investigates a runtime accuracy reconfigurable implementation of an energy
efficient deep learning accelerator. It is based on voltage overscaling (VOS) technique which …

On the efficiency of voltage overscaling under temperature and aging effects

H Amrouch, SB Ehsani, A Gerstlauer… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
Voltage overscaling has received extensive attention in the last decade as an attractive
paradigm for systems in which resulting timing errors and thus a loss in accuracy can be …

Toward self-tunable approximate computing

S Xu, BC Schafer - IEEE Transactions on Very Large Scale …, 2018 - ieeexplore.ieee.org
Many applications show tolerance to inaccuracies. These can be exploited to build faster
circuits with smaller area and lower power. This is particularly true for the hardware …

X-Rel: Energy-Efficient and Low-Overhead Approximate Reliability Framework for Error-Tolerant Applications Deployed in Critical Systems

J Vafaei, O Akbari, M Shafique… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
Triple modular redundancy (TMR) is one of the most common techniques in fault-tolerant
systems, in which the output is determined by a majority voter. However, the design diversity …

Memristive-based mixed-signal CGRA for accelerating deep neural network inference

R Kazerooni-Zand, M Kamal, A Afzali-Kusha… - ACM Transactions on …, 2023 - dl.acm.org
In this paper, a mixed-signal coarse-grained reconfigurable architecture (CGRA) for
accelerating inference in deep neural networks (DNNs) is presented. It is based on …

Efficient Error Estimation for High-Level Design Space Exploration of Approximate Computing Systems

M Vaeztourshizi, M Pedram - IEEE Transactions on Very Large …, 2023 - ieeexplore.ieee.org
This article presents an error estimation technique for a data-flow graph (DFG)
representation of an approximate computing (AC) circuit. The technique, which may be used …

AMROFloor: An efficient aging mitigation and resource optimization floorplanner for virtual coarse-grained runtime reconfigurable FPGAs

Z Li, Z Huang, Q Wang, J Wang - Electronics, 2022 - mdpi.com
With the rapid reduction of CMOS process size, the FPGAs with high-silicon accumulation
technology are becoming more sensitive to aging effects. This reduces the reliability and …