Three-dimensional (3D) packaging using through-Si-via (TSV) is a key technique for
achieving high-density integration, high-speed connectivity, and for downsizing of electronic …

Three-dimensional integration offers architectural and performance benefits for scaling
augmented/virtual reality (AR/VR) models on highly resource-constrained edge devices …

Environmental sustainability is crucial for Integrated Circuits (ICs) across their lifecycle,
particularly in manufacturing and use. Meanwhile, ICs using 3D/2.5 D integration …

Due to its high bandwidth, low latency, low power consumption, and compact size, three-
dimensional (3D) integration of semiconductor chips holds the promise of boosting the …

This work identifies the architectural and design scaling limits of 2-D flexible interconnect
deep neural network (DNN) accelerators and addresses them with 3-D ICs. We demonstrate …

Face-to-face bonded 3D integration has been shown to provide remarkable performance
and power benefits for next-generation computing systems, but power delivery remains a …

This paper proposes a mixed-size 3D analytical placement framework for face-to-face
stacked integrated circuits fabricated with heterogeneous technology nodes and connected …

In this paper, we provide an overview of design automation tools and methodology for
Monolithic 3D ICs, focusing on the accomplishments in recent years and the gaps that …

A 0.5 μm pitch multi-level back-end-of-line (BEOL) test vehicle was developed to evaluate
the performance of the wafer-to-wafer (W2W) bonding tool platform. Test structures with …