A comprehensive review on microwave FinFET modeling for progressing beyond the state of art

G Crupi, DMMP Schreurs, JP Raskin, A Caddemi - Solid-State Electronics, 2013 - Elsevier
FinFET is a multiple-gate silicon transistor structure that nowadays is attracting an extensive
attention to progress further into the nanometer era by going beyond the downscaling limit of …

Device design guideline of 5-nm-node FinFETs and nanosheet FETs for analog/RF applications

JS Yoon, RH Baek - IEEE Access, 2020 - ieeexplore.ieee.org
Analog/RF performances of 5-nm node bulk fin-shaped field-effect transistors (FinFETs) and
nanosheet FETs (NSFETs) were investigated and compared thoroughly using fully …

The large world of FET small‐signal equivalent circuits

G Crupi, A Caddemi, DMMP Schreurs… - … Journal of RF and …, 2016 - Wiley Online Library
The small‐signal equivalent circuit modeling of microwave field‐effect transistors (FETs) is
an evergreen and ever flourishing research field that has to be up‐to‐date with …

Subthreshold analog/RF performance enhancement of underlap DG FETs with high-k spacer for low power applications

K Koley, A Dutta, B Syamal, SK Saha… - IEEE transactions on …, 2012 - ieeexplore.ieee.org
This paper presents a systematic study of the subthreshold analog/RF performance for
underlap double gate (UDG) NMOSFETs using high dielectric constant (k) spacers. The …

A new millimeter-wave small-signal modeling approach for pHEMTs accounting for the output conductance time delay

G Crupi, DMMP Schreurs, A Raffo… - IEEE transactions on …, 2008 - ieeexplore.ieee.org
A new technique is developed for determining analytically a millimeter-wave small-signal
equivalent-circuit model of GaAs pseudomorphic HEMTs from scattering parameter …

Influence of Underlap on Gate Stack DG-MOSFET for analytical study of Analog/RF performance

A Kundu, A Dasgupta, R Das, S Chakraborty… - Superlattices and …, 2016 - Elsevier
In this paper, the characteristics of 18 nm Underlap Double Gate (U-DG) NMOSFET with
gate stack,(GS) are presented. The high-k dielectric as gate insulator under consideration is …

Non-quasi-static intrinsic GaN-HEMT model

BJ Touchaei, M Shalchian - IEEE Transactions on Electron …, 2022 - ieeexplore.ieee.org
This article presents a small-signal model of intrinsic gallium nitride high electron mobility
transistor (GaN HEMT) for non-quasi-static analysis. The model is derived from the charge …

Analysis of High- Spacer Asymmetric Underlap DG-MOSFET for SOC Application

K Koley, A Dutta, SK Saha… - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
In this paper, asymmetric underlap double-gate (AUDG) MOSFET is studied to analyze the
influence of high-k spacer on the intrinsic device parameters. The AUDG-MOSFET …

A multi-finger ghz frequency doubler based on amorphous indium gallium zinc oxide thin film transistors

U Kalita, C Tueckmantel, T Riedl, UR Pfeiffer - IEEE Access, 2023 - ieeexplore.ieee.org
This paper presents a multi-finger doubler based on amorphous-indium gallium zinc oxide
(a-IGZO) thin film transistors (TFT) operating at GHz frequency. The doubler and the TFTs …

Investigation on the non‐quasi‐static effect implementation for millimeter‐wave FET models

G Crupi, DMMP Schreurs, A Caddemi… - … Journal of RF and …, 2010 - Wiley Online Library
The present article analyzes in detail different intrinsic small‐signal models for transistors.
Particular attention is devoted to the non‐quasi‐static effects, which play a crucial role at …