FinFETs: From devices to architectures

D Bhattacharya, NK Jha - Advances in Electronics, 2014 - Wiley Online Library
Since Moore's law driven scaling of planar MOSFETs faces formidable challenges in the
nanometer regime, FinFETs and Trigate FETs have emerged as their successors. Owing to …

Building low-diameter peer-to-peer networks

G Pandurangan, P Raghavan… - IEEE Journal on selected …, 2003 - ieeexplore.ieee.org
Peer-to-peer (P2P) computing has emerged as a significant paradigm for providing
distributed services, in particular search and data sharing. Current P2P networks (eg …

Design of a CNTFET-based SRAM cell by dual-chirality selection

S Lin, YB Kim, F Lombardi - IEEE Transactions on …, 2009 - ieeexplore.ieee.org
This paper proposes a new design of a highly stable and low-power static RAM (SRAM) cell
using carbon nanotube FETs (CNTFETs) that utilizes different threshold voltages for best …

Comparative evaluation of layout density in 3T, 4T, and MT FinFET standard cells

M Alioto - IEEE Transactions on Very Large Scale Integration …, 2010 - ieeexplore.ieee.org
In this paper, issues related to the physical design and layout density of FinFET standard
cells are discussed. Analysis significantly extends previous analyses, which considered the …

A novel 6T SRAM cell with asymmetrically gate underlap engineered FinFETs for enhanced read data stability and write ability

SM Salahuddin, H Jiao, V Kursun - International symposium on …, 2013 - ieeexplore.ieee.org
A new FinFET memory circuit technique based on asymmetrically gate underlap engineered
bitline access transistors is proposed in this paper. The strengths of the asymmetrical bitline …

A new SRAM cell design using CNTFETs

S Lin, YB Kim, F Lombardi… - 2008 International SoC …, 2008 - ieeexplore.ieee.org
As CMOS devices scales to the nano ranges, increased short channel effects and process
variations considerably affect device and circuit designs. Novel devices are been proposed …

Reliable high-yield CNTFET-based 9T SRAM operating near threshold voltage region

PK Patel, MM Malik, TK Gupta - Journal of Computational Electronics, 2018 - Springer
We propose a reliable high-yield nine-carbon-nanotube field-effect transistor (9-CNTFET)
static random-access memory (SRAM) cell using shared bit line and half-select-free …

Design, simulation and comparative analysis of a novel FinFET based astable multivibrator

A Gupta, R Mathur, M Nizamuddin - AEU-International Journal of …, 2019 - Elsevier
In this work, design and simulation of FinFET and CMOS based Astable Multivibrator (AMV)
have been performed. Performance of proposed circuit was compared by varying resistance …

A CNTFET based stable, single-ended 7T SRAM cell with improved write operation

A Sachdeva, K Sharma, A Bhargava… - Physica Scripta, 2024 - iopscience.iop.org
Many researchers are working to improve the write operation in SRAM bit-cell for better write
stability, low power dissipation, and minimal access time during the write process. However …

Design of high speed ternary full adder and three-input XOR circuits using CNTFETs

SL Murotiya, A Gupta - 2015 28th International Conference on …, 2015 - ieeexplore.ieee.org
This paper proposes a new high speed ternary full adder (TFA) cell for carbon nano tube
field effect transistor (CNTFET) technology. The proposed design has a symmetric pull-up …