A survey of research and practices of network-on-chip
T Bjerregaard, S Mahadevan - ACM Computing Surveys (CSUR), 2006 - dl.acm.org
The scaling of microchip technologies has enabled large scale systems-on-chip (SoC).
Network-on-chip (NoC) research addresses global communication in SoC, involving (i) a …
Network-on-chip (NoC) research addresses global communication in SoC, involving (i) a …
Design, synthesis, and test of networks on chips
For networks on chips to succeed as the next generation of on-chip interconnect,
researchers must solve the major problems involved in designing, implementing, verifying …
researchers must solve the major problems involved in designing, implementing, verifying …
[图书][B] Computer architecture: a quantitative approach
JL Hennessy, DA Patterson - 2011 - books.google.com
Computer Architecture: A Quantitative Approach, Fifth Edition, explores the ways that
software and technology in the cloud are accessed by digital media, such as cell phones …
software and technology in the cloud are accessed by digital media, such as cell phones …
Outstanding research problems in NoC design: system, microarchitecture, and circuit perspectives
To alleviate the complex communication problems that arise as the number of on-chip
components increases, network-on-chip (NoC) architectures have been recently proposed …
components increases, network-on-chip (NoC) architectures have been recently proposed …
[图书][B] Three-dimensional integrated circuit design
Three-Dimensional Integrated Circuit Design, Second Eition, expands the original with more
than twice as much new content, adding the latest developments in circuit models …
than twice as much new content, adding the latest developments in circuit models …
3-D topologies for networks-on-chip
VF Pavlidis, EG Friedman - IEEE transactions on very large …, 2007 - ieeexplore.ieee.org
Several interesting topologies emerge by incorporating the third dimension in networks-on-
chip (NoC). The speed and power consumption of 3D NoC are compared to that of 2D NoC …
chip (NoC). The speed and power consumption of 3D NoC are compared to that of 2D NoC …
" It's a small world after all": NoC performance optimization via long-range link insertion
UY Ogras, R Marculescu - … on very large scale integration (VLSI …, 2006 - ieeexplore.ieee.org
Networks-on-chip (NoCs) represent a promising solution to complex on-chip communication
problems. The NoC communication architectures considered so far are based on either …
problems. The NoC communication architectures considered so far are based on either …
[PDF][PDF] Survey of network on chip (noc) architectures & contributions
A Agarwal, C Iskander, R Shankar - Journal of engineering …, 2009 - researchgate.net
Multiprocessor architectures and platforms have been introduced to extend the applicability
of Moore's law. They depend on concurrency and synchronization in both software and …
of Moore's law. They depend on concurrency and synchronization in both software and …
Key research problems in NoC design: a holistic perspective
Networks-on-Chip (NoCs) have been recently proposed as a promising solution to complex
on-chip communication problems. The lack of an unified representation of applications and …
on-chip communication problems. The lack of an unified representation of applications and …
[PDF][PDF] Survey of network-on-chip proposals
E Salminen, A Kulmala, TD Hamalainen - white paper, OCP-IP, 2008 - academia.edu
This paper gives an overview of state-of-the-art regarding the network-on-chip (NoC)
proposals. NoC paradigm replaces dedicated, design-specific wires with scalable, general …
proposals. NoC paradigm replaces dedicated, design-specific wires with scalable, general …