GaN electronics constitutes a revolutionary technology with power handling capabilities that
amply exceed those of Si and other semiconductors in many applications. RF, microwave …

In this article a review of low temperature (LT)(≤ 500° C) process modules in view of 3-D
sequential integration is presented. First, both the bottom device thermal stability and …

The recent advancement of wafer bonding and monolithic integration technology offers fine-
grained 3-D interconnections to face-to-face (F2F) and monolithic 3-D (M3D) ICs. In this …

The continued physical feature size scaling of CMOS transistors is experiencing asperities
due to several factors (physical, technological, and economical), and it is expected to reach …

Instabilities in MOS-based devices with various substrates ranging from Si, SiGe, IIIV to 2D
channel materials, can be explained by defect levels in the dielectrics and non-radiative …

US10770353B2 - Method of forming multi-threshold voltage devices using dipole-high dielectric
constant combinations and devices so formed - Google Patents US10770353B2 - Method of …

3-D sequential integration requires top MOSFETs processed at a low thermal budget, which
can impair the device reliability. In this paper, top junctionless (JL) devices are fabricated …

In this paper, we review the current progress on 3D sequential device stacking, highlighting
the main integration challenges and the possible technological solutions. Next, we explore …

In order to maintain the scaling trend in logic technology node progression, imec technology
nodes started heavily utilizing design technology co-optimization (DTCO) on top of loosen …

We investigate the statistical variability of the threshold voltage and its sensitivity to critical
geometrical parameters in ultrascaled In0. 53Ga0. 47As and Si MOSFETs by means of 3-D …