Device authentication using a physically unclonable functions based key generation system

P Koeberl, J Li - US Patent 8,938,792, 2015 - Google Patents
(51) Int. Cl.(57) ABSTRACT G06F2L/00(2013.01) At least one machine accessible medium
having instructions G06F2L/70(2013.01) stored thereon for authenticating a hardware …

Secure provisioning of secret keys during integrated circuit manufacturing

KC Gotze, GM Iovino, J Li - US Patent 9,742,563, 2017 - Google Patents
A method, of an aspect, includes challenging a set of Physically Unclonable Function (PUF)
cells, of an integrated circuit device, and receiving a set of PUF bits from the PUF cells in …

Secure key derivation and cryptography logic for integrated circuits

GW Cox, D Johnston, J Li, A Rajan - US Patent 9,390,291, 2016 - Google Patents
A processor of an aspect includes root key generation logic to generate a root key. The root
key generation logic includes a source of static and entropic bits. The processor also …

Integrated circuits having accessible and inaccessible physically unclonable functions

KC Gotze, GM Iovino, J Li, D Johnston… - US Patent …, 2015 - Google Patents
An integrated circuit Substrate of an aspect includes a plural ity of exposed electrical
contacts. The integrated circuit Sub strate also includes an inaccessible set of Physically …

Integrated circuit provisioning using physical unclonable function

PD Ducharme, H Zheng - US Patent App. 14/082,829, 2015 - Google Patents
(57) ABSTRACT A one-time programmable (OTP) memory of an integrated circuit is
provisioned based on identifier data generated by a physical unclonable function (PUF) of …

Secure key storage using physically unclonable functions

J Li, A Rajan, R Maes, SK Mathew… - US Patent …, 2017 - Google Patents
Some implementations disclosed herein provide techniques and arrangements for
provisioning keys to integrated cir cuits/processors. A processor may include physically …

Physically unclonable function based on programming voltage of magnetoresistive random-access memory

X Zhu, SM Millendorf, X Guo, DM Jacobson… - US Patent …, 2016 - Google Patents
(60) Provisional application No. 61/875,566, filed on Sep. than a first voltage and less than a
second voltage. The tran 9, 2013. sition Voltage represents a Voltage level that causes the …

Systems and methods for leveraging path delay variations in a circuit and generating error-tolerant bitstrings

J Plusquellic, J Aarestad - US Patent 10,230,369, 2019 - Google Patents
Majzoobi, et. al,“FPGA PUF using programmable delay lines”, WIFS'2010, Dec. 12-15,
2010.* J. Aarestad et al., HELP: A Hardware-Embedded Delay PUF., IEEE Design & Test …

Use of a (Digital) PUF for Implementing Physical Degradation/Tamper Recognition for a Digital IC

R Falk, A Mucha - US Patent App. 14/415,369, 2015 - Google Patents
Appl. No.: 14/415,369 An integrated circuit configured for malfunction detection includes an
integrity sensor and a test unit. The integrity (22) PCT Filed: Jun. 5, 2013 sensor is based on …

Terminal identification method, and method, system and apparatus of registering machine identification code

Y Fu, Y Zhang, Z Zhang, J Liu - US Patent 9,648,008, 2017 - Google Patents
(57) ABSTRACT A terminal identification method, a machine identification code registration
method and related system and apparatus are disclosed. After receiving a first request for …