High-level synthesis design space exploration: Past, present, and future
BC Schafer, Z Wang - … on Computer-Aided Design of Integrated …, 2019 - ieeexplore.ieee.org
This article presents a survey of the different modern high-level synthesis (HLS) design
space exploration (DSE) techniques that have been proposed so far to automatically …
space exploration (DSE) techniques that have been proposed so far to automatically …
Pylog: An algorithm-centric python-based FPGA programming and synthesis flow
The exploding complexity and computation efficiency requirements of applications are
stimulating a strong demand for hardware acceleration with heterogeneous platforms such …
stimulating a strong demand for hardware acceleration with heterogeneous platforms such …
High-level synthesis performance prediction using gnns: Benchmarking, modeling, and advancing
Agile hardware development requires fast and accurate circuit quality evaluation from early
design stages. Existing work of high-level synthesis (HLS) performance prediction usually …
design stages. Existing work of high-level synthesis (HLS) performance prediction usually …
Accelerating framework of transformer by hardware design and model compression co-optimization
P Qi, EHM Sha, Q Zhuge, H Peng… - 2021 IEEE/ACM …, 2021 - ieeexplore.ieee.org
State-of-the-art Transformer-based models, with gigantic parameters, are difficult to be
accommodated on resource constrained embedded devices. Moreover, with the …
accommodated on resource constrained embedded devices. Moreover, with the …
High-level synthesis hardware design for fpga-based accelerators: Models, methodologies, and frameworks
Hardware accelerators based on field programmable gate array (FPGA) and system on chip
(SoC) devices have gained attention in recent years. One of the main reasons is that these …
(SoC) devices have gained attention in recent years. One of the main reasons is that these …
Correlated multi-objective multi-fidelity optimization for HLS directives design
High-level synthesis (HLS) tools have gained great attention in recent years because it
emancipates engineers from the complicated and heavy hardware description language …
emancipates engineers from the complicated and heavy hardware description language …
Ai-assisted synthesis in next generation eda: Promises, challenges, and prospects
Despite the great advance achieved by electronic design automation (EDA) tools, there is
still a long way towards hardware agile development, whose ultimate goal is to reduce chip …
still a long way towards hardware agile development, whose ultimate goal is to reduce chip …
FP-Stereo: Hardware-efficient stereo vision for embedded applications
Fast and accurate depth estimation, or stereo matching, is essential in embedded stereo
vision systems, requiring substantial design effort to achieve an appropriate balance among …
vision systems, requiring substantial design effort to achieve an appropriate balance among …
[HTML][HTML] Hardware acceleration of complex HEP algorithms with HLS and FPGAs: Methodology and preliminary implementation
A Wojenski, H Zbroszczyk, M Kruszewski… - Computer Physics …, 2024 - Elsevier
The amount of data coming from modern acquisition systems, especially working in extreme
experimental conditions, is significantly rising over the years. Combined with complex …
experimental conditions, is significantly rising over the years. Combined with complex …
MVSym: Efficient symbiotic exploitation of HLS-kernel multi-versioning for collaborative CPU-FPGA cloud systems
Cloud Warehouses have been exploiting CPU-FPGA collaborative environments, where
clients share the same infrastructure to maximize resource utilization with energy efficiency …
clients share the same infrastructure to maximize resource utilization with energy efficiency …