Nanopore sequencing technology and tools for genome assembly: computational analysis of the current state, bottlenecks and future directions

D Senol Cali, JS Kim, S Ghose, C Alkan… - Briefings in …, 2019 - academic.oup.com
Nanopore sequencing technology has the potential to render other sequencing
technologies obsolete with its ability to generate long reads and provide portability …

A survey of processors with explicit multithreading

T Ungerer, B Robič, J Šilc - ACM Computing Surveys (CSUR), 2003 - dl.acm.org
Hardware multithreading is becoming a generally applied technique in the next generation
of microprocessors. Several multithreaded processors are announced by industry or already …

{TVM}: An automated {End-to-End} optimizing compiler for deep learning

T Chen, T Moreau, Z Jiang, L Zheng, E Yan… - … USENIX Symposium on …, 2018 - usenix.org
There is an increasing need to bring machine learning to a wide diversity of hardware
devices. Current frameworks rely on vendor-specific operator libraries and optimize for a …

[PDF][PDF] TVM: end-to-end optimization stack for deep learning

T Chen, T Moreau, Z Jiang, H Shen… - arXiv preprint arXiv …, 2018 - dada.cs.washington.edu
Scalable frameworks, such as TensorFlow, MXNet, Caffe, and PyTorch drive the current
popularity and utility of deep learning. However, these frameworks are optimized for a …

Locality exists in graph processing: Workload characterization on an ivy bridge server

S Beamer, K Asanovic… - 2015 IEEE International …, 2015 - ieeexplore.ieee.org
Graph processing is an increasingly important application domain and is typically
communication-bound. In this work, we analyze the performance characteristics of three …

[PDF][PDF] Dynamic partitioning of shared cache memory

GE Suh, L Rudolph, S Devadas - The Journal of …, 2004 - people.csail.mit.edu
This paper proposes dynamic cache partitioning amongst simultaneously executing
processes/threads. We present a general partitioning scheme that can be applied to set …

Piranha: A scalable architecture based on single-chip multiprocessing

LA Barroso, K Gharachorloo, R McNamara… - ACM SIGARCH …, 2000 - dl.acm.org
The microprocessor industry is currently struggling with higher development costs and
longer design times that arise from exceedingly complex processors that are pushing the …

Memristor for computing: Myth or reality?

S Hamdioui, S Kvatinsky… - … , Automation & Test …, 2017 - ieeexplore.ieee.org
CMOS technology and its sustainable scaling have been the enablers for the design and
manufacturing of computer architectures that have been fuelling a wider range of …

Balancing thoughput and fairness in SMT processors

K Luo, J Gummaraju, M Franklin - 2001 IEEE International …, 2001 - computer.org
Simultaneous Multithreading (SMT) is an execution model that executes multiple threads in
parallel within a single processor pipeline. Usually, an SMT processor uses shared …

AGORA: Attributed goal-oriented requirements analysis method

H Kaiya, H Horai, M Saeki - Proceedings IEEE joint …, 2002 - ieeexplore.ieee.org
This paper presents an extended version of the goal-oriented requirements analysis method
called AGORA, where attribute values, eg contribution values and preference matrices, are …