Edge computing-based SAT-video coding for remote sensing
TA Bui, PJ Lee, KY Chen, CR Chen, CSJ Liu… - IEEE …, 2022 - ieeexplore.ieee.org
This paper proposes an edge computing-based video coding implementation on an Earth
observation satellite (SAT-video coding), which can encode video using limited resources …
observation satellite (SAT-video coding), which can encode video using limited resources …
Hardware, design and implementation issues on a FPGA-based smart camera
F Dias, F Berry, J Sérot… - 2007 First ACM/IEEE …, 2007 - ieeexplore.ieee.org
Processing images to extract useful information in real-time is a complex task, dealing with
large amounts of iconic data and requiring intensive computation. Smart cameras use …
large amounts of iconic data and requiring intensive computation. Smart cameras use …
A FPGA core generator for embedded classification systems
We describe in this work a Core Generator for Pattern Recognition tasks. This tool is able to
generate, according to user requirements, the hardware description of a digital architecture …
generate, according to user requirements, the hardware description of a digital architecture …
Real-time motion estimation diamond search algorithm for the new high efficiency video coding on FPGA
High efficiency video coding (HEVC) is the latest video coding standard aimed to replace the
H. 264/AVC standard according to its high coding performance, which allows it to be mostly …
H. 264/AVC standard according to its high coding performance, which allows it to be mostly …
An efficient implementation of online arithmetic
Y Zhao, J Wickerson… - … Conference on Field …, 2016 - ieeexplore.ieee.org
We propose the first hardware implementation of standard arithmetic operators-addition,
multiplication, and division-that utilises constant compute resource but allows numerical …
multiplication, and division-that utilises constant compute resource but allows numerical …
Low-complexity motion estimation design using modified XOR function
EA AlQaralleh, OMF Abu-Sharkh - Multimedia Tools and Applications, 2016 - Springer
Video coding techniques which are characterized by huge computational burden
extensively consume power. Motion estimation with block matching criterion utilizing sum of …
extensively consume power. Motion estimation with block matching criterion utilizing sum of …
Three-dimensional image reconstruction of macroscopic objects from a single digital hologram using stereo disparity
We present depth extraction of macroscopic three-dimensional (3D) objects from a single
digital hologram using stereo disparity. The method does not require the phase information …
digital hologram using stereo disparity. The method does not require the phase information …
Implementation of a motion estimation hardware accelerator on Zynq SoC
T Makryniotis, M Dasygenis - 2017 6th International …, 2017 - ieeexplore.ieee.org
The new trends in multimedia and especially in video applications demand the best possible
quality, among with low bandwidth and memory usage. While video compression has been …
quality, among with low bandwidth and memory usage. While video compression has been …
Real-time motion detection using block matching algorithms on multicore processors
Block matching algorithms (BMAs) like sum of absolute difference (SAD) and normalised
cross correlation (NCC) form the basic building block in many computer vision applications …
cross correlation (NCC) form the basic building block in many computer vision applications …
Speed-area optimized FPGA implementation for full search block matching
This paper presents an FPGA based hardware design for full search block matching (FSBM)
based motion estimation (ME) in video compression. The significantly higher resolution of …
based motion estimation (ME) in video compression. The significantly higher resolution of …