Certain investigations on recent advances in the design of decoding algorithms using low‐density parity‐check codes and its applications
M Kingston Roberts, S Kumari… - International Journal of …, 2021 - Wiley Online Library
Information theory coding is an impressive and most celebrated field of research that has
spawned numerous extremely important solutions to the intractable problems of secure data …
spawned numerous extremely important solutions to the intractable problems of secure data …
Flexible high throughput QC-LDPC decoder with perfect pipeline conflicts resolution and efficient hardware utilization
VL Petrović, MM Marković… - … on Circuits and …, 2020 - ieeexplore.ieee.org
Modern communication standards, such as 5G new radio (5G NR), require a high speed
decoder for highly irregular quasi-cyclic low density parity check (QC-LDPC) codes. A widely …
decoder for highly irregular quasi-cyclic low density parity check (QC-LDPC) codes. A widely …
High-speed LDPC decoders towards 1 Tb/s
Beyond 5G systems are expected to approach 1 Tb/s throughput. This poses a significant
challenge to the channel decoder. In this paper, we propose a multi-core architecture based …
challenge to the channel decoder. In this paper, we propose a multi-core architecture based …
Low computational-complexity SOMS-algorithm and high-throughput decoder architecture for QC-LDPC codes
A Verma, R Shrestha - IEEE Transactions on Vehicular …, 2022 - ieeexplore.ieee.org
This article proposes a simplified offset min-sum (SOMS) decoding algorithm for the QC-
LDPC codes. It is an implementation-friendly algorithm based on a new logarithmic …
LDPC codes. It is an implementation-friendly algorithm based on a new logarithmic …
A Generalized Adjusted Min-Sum Decoder for 5G LDPC Codes: Algorithm and Implementation
5G New Radio (NR) has stringent demands on both performance and complexity for the
design of low-density parity-check (LDPC) decoding algorithms and corresponding VLSI …
design of low-density parity-check (LDPC) decoding algorithms and corresponding VLSI …
A reconfigurable LDPC decoder optimized for 802.11 n/ac applications
I Tsatsaragkos, V Paliouras - IEEE Transactions on Very Large …, 2017 - ieeexplore.ieee.org
This paper presents a high data-rate low-density parity-check (LDPC) decoder, suitable for
the 802.11 n/ac (WiFi) standard. The innovative features of the proposed decoder relate to …
the 802.11 n/ac (WiFi) standard. The innovative features of the proposed decoder relate to …
A multi-Gb/s frame-interleaved LDPC decoder with path-unrolled message passing in 28-nm CMOS
M Milicevic, PG Gulak - IEEE Transactions on Very Large Scale …, 2018 - ieeexplore.ieee.org
This paper presents a frame-interleaved low-density parity-check (LDPC) decoder
architecture with a new interconnect partitioning scheme and time-distributed Min-Sum …
architecture with a new interconnect partitioning scheme and time-distributed Min-Sum …
Review on 5G NR LDPC code: recommendations for DTTB system
The freeze of the 5th generation new radio (5G NR) Release 16 indicates that 5G
development has stepped into a new stage. The application of a dedicated low-density …
development has stepped into a new stage. The application of a dedicated low-density …
A new partially-parallel VLSI-architecture of quasi-cyclic LDPC decoder for 5G new-radio
A Verma, R Shrestha - … Conference on VLSI Design and 2020 …, 2020 - ieeexplore.ieee.org
This paper presents partially-parallel low-density parity-check (LDPC) decoder architecture
for binary-input additive-white Gaussian-noise (BIAWGN) channel in 5G new-radio cellular …
for binary-input additive-white Gaussian-noise (BIAWGN) channel in 5G new-radio cellular …
A 5.28-Gb/s LDPC decoder with time-domain signal processing for IEEE 802.15. 3c applications
This paper presents a high-throughput, energy-efficient, and scalable low-density parity-
check (LDPC) decoder with time-domain (TD) signal processing. The proposed arbiter …
check (LDPC) decoder with time-domain (TD) signal processing. The proposed arbiter …