By the continuing downscaling of sub-micron transistors in the range of few to sub-
decananometers, we focus on the increasing relative level of the low-frequency noise in …

Portable, embedded systems place ever-increasing demands on high-performance, low-
power microprocessor design. Dynamic voltage and frequency scaling (DVFS) is a well …

This paper presents a new nonvolatile magnetic flip-flop (MFF) for standby-power-critical
applications. An MFF primitive cell for design libraries has been developed using 150 nm …

The paradigm and the usage of CMOS are changing, and so are the requirements at all
levels, from transistor to an entire CMOS system. The traditional drivers, such as speed and …

The power consumption of integrated circuits is one of the most problematic considerations
affecting the design of high-performance chips and portable devices. The study of power …

Power Gating has become one of the most widely used circuit design techniques for
reducing leakage current. Its concept is very simple, but its application to standard-cell VLSI …

Most existing power gating structures provide only one power-saving mode. We propose a
novel power gating structure that supports both a cutoff mode and an intermediate power …

(57) ABSTRACT A Static Random Access Memory (SRAM) cell having high stability and low
leakage is provided. The SRAM cell includes a pair of cross-coupled inverters providing …

Various radiation hardened by design SRAM cells are explored for their size, electrical
performance, and total ionizing dose (TID) immunity. TID experiments using Co-60 testing …

VDD scaling is an efficient technique to reduce SRAM leakage power during standby mode.
The data retention voltage (DRV) defines the minimum VDD that can be applied to an SRAM …