CMOS integrated circuits for the quantum information sciences

J Anders, M Babaie, JC Bardin, I Bashir… - IEEE transactions on …, 2023 - ieeexplore.ieee.org
Over the past decade, significant progress in quantum technologies has been made, and
hence, engineering of these systems has become an important research area. Many …

Semiconductor quantum computing: Toward a CMOS quantum computer on chip

R Nikandish, E Blokhina, D Leipold… - IEEE Nanotechnology …, 2021 - ieeexplore.ieee.org
Quantum computing has the potential to create a paradigm shift in computing technology,
which can lead to breakthroughs in emerging applications that rely on ultra-high …

Cryo-CMOS for quantum system on-chip integration: Quantum computing as the development driver

RB Staszewski, I Bashir, E Blokhina… - IEEE Solid-State …, 2021 - ieeexplore.ieee.org
Quantum computing (QC) is a new paradigm that exploits fundamental principles of
quantum mechanics, such as superposition and entanglement, to tackle problems in …

A fully integrated DAC for CMOS position-based charge qubits with single-electron detector loopback testing

A Esmailiyan, H Wang, M Asker… - IEEE Solid-State …, 2020 - ieeexplore.ieee.org
This letter presents a fully integrated interface circuitry with a position-based charge qubit
structure implemented in 22-nm FDSOI CMOS. The quantum structure is controlled by a tiny …

CMOS charge qubits and qudits: Entanglement entropy and mutual information as an optimization method to construct CNOT and SWAP gates

P Giounanlis, X Wu, A Sokolov… - Semiconductor …, 2021 - iopscience.iop.org
In this paper, we propose an optimization method for the construction of two-qubit and two-
qudit quantum gates based on semiconductor position-based charge qubits. To describe the …

Ab initio DFT approaches to CMOS quantum dot simulation

AV Bharadwaj - 2022 - search.proquest.com
An ab initio, atomistic, density functional theory (DFT) simulation approach is reported to
capture the impact of temperature, gate oxide spacer width, gate length, and device …

Cryogenic Controller for Electrostatically Controlled Quantum Dots in 22-nm Quantum SoC

RB Staszewski, A Esmailiyan, H Wang… - IEEE Open Journal …, 2022 - ieeexplore.ieee.org
We present a fully integrated cryogenic controller for electrostatically controlled quantum
dots (QDs) implemented in a commercial 22-nm fully depleted silicon-on-insulator CMOS …

A Circuit Design Journey from Room Temperature to Cryo Temperature

A Esmailiyan - 2020 - researchrepository.ucd.ie
The continual advancement of CMOS technology results in faster and more power efficient
digital processing. Concurrently, the supply voltage of CMOS circuits is scaled lower and this …