SimpleScalar: An infrastructure for computer system modeling
Designers can execute programs on software models to validate a proposed hardware
design's performance and correctness, while programmers can use these models to develop …
design's performance and correctness, while programmers can use these models to develop …
Visualizing complex dynamics in many-core accelerator architectures
A Ariel, WWL Fung, AE Turner… - 2010 IEEE International …, 2010 - ieeexplore.ieee.org
While many-core accelerator architectures, such as today's Graphics Processing Units
(GPUs), offer orders of magnitude more raw computing power than contemporary CPUs …
(GPUs), offer orders of magnitude more raw computing power than contemporary CPUs …
Nyami: a synthesizable GPU architectural model for general-purpose and graphics-specific workloads
Graphics processing units (GPUs) continue to grow in popularity for general-purpose, highly
parallel, high-throughput systems. This has forced GPU vendors to increase their focus on …
parallel, high-throughput systems. This has forced GPU vendors to increase their focus on …
Image data compression method and apparatuses, image display method and apparatuses
L Cheng, YF Fang, Q Liang, P Yang, YZ Xu… - US Patent …, 2011 - Google Patents
The image data compression method involves the performing of steps: a block dividing step
for dividing a computer processor pipeline statistic image to be displayed into a plurality of …
for dividing a computer processor pipeline statistic image to be displayed into a plurality of …
[PDF][PDF] TraceVis: an execution trace visualization tool
JE Roberts, C Zilles - 2004 - zilles.cs.illinois.edu
In this thesis we introduce TraceVis, a tool for exploring application behavior as it relates to
its execution on a microprocessor. Through a host of features, TraceVis enables users to …
its execution on a microprocessor. Through a host of features, TraceVis enables users to …
Inferno: Streamlining verification with inferred semantics
A DeOrio, AB Bauserman, V Bertacco… - IEEE Transactions on …, 2009 - ieeexplore.ieee.org
Understanding designers' intentions and accurately verifying a design are major obstacles
for verification engineers today. Currently available debugging tools, such as waveform …
for verification engineers today. Currently available debugging tools, such as waveform …
Recent extensions to the simplescalar tool suite
Over the past eight years, the SimpleScalar Tool suite has become the most widely used set
of simulation tools in the computer architecture research community. The authors have …
of simulation tools in the computer architecture research community. The authors have …
RISCALAR: A Cycle-Approximate, Parametrisable RISC-V Microarchitecture Explorer & Simulator
J Mendes, RC Panicker - 2024 IEEE International Symposium …, 2024 - ieeexplore.ieee.org
Riscalar is a highly parameterisable, extensible, and modular computer architecture
simulation tool designed for the RISC-V ISA. The ability of Riscalar to explore a large design …
simulation tool designed for the RISC-V ISA. The ability of Riscalar to explore a large design …
Effective support of simulation in computer architecture instruction
CT Weaver, E Larson, T Austin - Proceedings of the 2002 workshop on …, 2002 - dl.acm.org
The use of simulation is well established in academic and industry research as a means of
evaluating architecture trade-offs. The large code base, complex architectural models, and …
evaluating architecture trade-offs. The large code base, complex architectural models, and …
[PDF][PDF] Techniques for visualizing software execution
J Seyster - A Research Proficiency Exam Presented, Technical …, 2008 - fsl.cs.sunysb.edu
A software execution visualization seeks to be a window into what a program does while it
runs. The user of a visualization wants the ability to examine a program's execution simply …
runs. The user of a visualization wants the ability to examine a program's execution simply …