Si, SiGe nanowire devices by top–down technology and their applications

N Singh, KD Buddharaju, SK Manhas… - … on Electron Devices, 2008 - ieeexplore.ieee.org
Nanowire (NW) devices, particularly the gate-all-around (GAA) CMOS architecture, have
emerged as the front-runner for pushing CMOS scaling beyond the roadmap. These devices …

Tailoring light–matter coupling in semiconductor and hybrid-plasmonic nanowires

B Piccione, CO Aspetti, CH Cho… - Reports on Progress in …, 2014 - iopscience.iop.org
Understanding interactions between light and matter is central to many fields, providing
invaluable insights into the nature of matter. In its own right, a greater understanding of light …

A high-performance complementary inverter based on transition metal dichalcogenide field-effect transistors

AJ Cho, KC Park, JY Kwon - Nanoscale research letters, 2015 - Springer
For several years, graphene has been the focus of much attention due to its peculiar
characteristics, and it is now considered to be a representative 2-dimensional (2D) material …

CMOS logic device and circuit performance of Si gate all around nanowire MOSFET

K Nayak, M Bajaj, A Konar, PJ Oldiges… - … on Electron Devices, 2014 - ieeexplore.ieee.org
In this paper, a detailed 3-D numerical analysis is carried out to study and evaluate CMOS
logic device and circuit performance of gate-all-around (GAA) Si nanowire (NW) field-effect …

Gate-all-around nanowire MOSFET with catalytic metal gate for gas sensing applications

R Gautam, M Saxena, RS Gupta… - IEEE transactions on …, 2013 - ieeexplore.ieee.org
In this paper, gate-all-around (GAA) MOSFET with catalytic metal gate is proposed for
enhanced sensitivity of gas sensor. P-channel GAA MOSFET with palladium (Pd) metal gate …

Numerical model of gate-all-around MOSFET with vacuum gate dielectric for biomolecule detection

R Gautam, M Saxena, RS Gupta… - IEEE electron device …, 2012 - ieeexplore.ieee.org
In this letter, a dielectric-modulated GAA MOSFET with vacuum gate dielectric is proposed
for enhanced sensitivity for label-free detection of neutral and charged biomolecules. We …

Variability in Si nanowire MOSFETs due to the combined effect of interface roughness and random dopants: A fully three-dimensional NEGF simulation study

A Martinez, N Seoane, AR Brown… - … on electron devices, 2010 - ieeexplore.ieee.org
In this paper, we study the impact of surface roughness and its combination with random
discrete dopants on the current variability in nanometer-scale nanowire metal …

Electronic Transport Modulation in Ultrastrained Silicon Nanowire Devices

MG Bartmann, S Glassner, M Sistani… - … Applied Materials & …, 2024 - ACS Publications
In this work, we explore the effect of ultrahigh tensile strain on electrical transport properties
of silicon. By integrating vapor–liquid–solid-grown nanowires into a micromechanical …

Investigation of low-frequency noise in silicon nanowire MOSFETs in the subthreshold region

C Wei, YZ Xiong, X Zhou, N Singh… - IEEE electron device …, 2009 - ieeexplore.ieee.org
The low-frequency noise (LFN) in the subthreshold region of both n-and p-type gate-all-
around silicon nanowire transistors (SNWTs) is investigated. The measured drain-current …

Demonstration of Ge nanowire CMOS devices and circuits for ultimate scaling

H Wu, W Wu, M Si, DY Peide - IEEE Transactions on Electron …, 2016 - ieeexplore.ieee.org
In this paper, Ge nanowire (NW) CMOS devices and circuits are analyzed in detail. Various
experiment splits are studied, including device geometry parameters such as the channel …