For the first time in the history of European data protection law, the use of visualizations and
especially of icons is explicitly suggested as a way to improve the comprehensibility of the …

This paper presents the design of a highly efficient CMOS level shifter qc-level shifter. Unlike
many recent level shifters, the proposed qc-level shifter does not use bootstrap capacitors to …

This paper presents the design of a highly energy efficient CMOS adiabatic driver (ob-
driver). The proposed ob-driver uses an output stage with two inverters driven by a pre …

This paper presents the design of a low energy CMOS adiabatic inverter (Ib-driver). The
proposed Ib-driver structure uses complementary input, output and a dual-rail structure …

This paper presents the design of a highly efficient CMOS 2-input NAND (gcr-nand). When
implemented on a 65 nm CMOS technology, under 1 pF capacitive loading condition, gcr …

This paper presents the design of an adiabatic/bootstrapped CMOS driver (xb-ad) using
complementary pass-transistor logic (CPL) and a four-phase power clock. The proposed xb …

This paper introduces a very low static current CMOS level up shifter for low voltage single
supply and high performance. The proposed low to high voltage level shifter is implemented …

This paper presents the design of a highly energy efficient CMOS adiabatic inverter driver
(scal-driver). The proposed scal-driver uses a single input stage based on a single transistor …

This paper presents the design of a highly energy efficient CMOS adiabatic driver (ee-
driver). The proposed ee-driver uses an output stage with two bootstrap capacitors driven by …