A new technique is introduced for digital background calibration in pipeline analog to digital
converters (ADCs). The technique is based on the decision points of the voltage transfer …

In this paper, a statistics-based digital background calibration technique for pipelined analog-
to-digital converters (ADCs) is presented. This technique employs the residue voltage …

This brief presents a digital background calibration technique for pipelined analog-to-digital
converters (ADCs). It is a histogram-based technique and called the correction with …

The CMOS scaling and power usage limitations make the calibration techniques inevitable
in the design and implementation of pipeline analog-to-digital converters (ADCs) especially …

An analog background calibration approach is presented for the full calibration of pipeline
analog‐to‐digital converters (ADCs). A well‐trained neural network acts close to the ideal …

The random noise test of analog to digital converters recommended by the IEEE 1057
Standard for digitizing waveform recorders is studied. The heuristically derived expression …

This paper describes a prototype two-step ADC with adjustable resolution in 40 nm CMOS
technology. It uses a front-end successive-approximation-register ADC and a back-end time …

A mathematical model is established to study the impact of nonlinear errors on the
performance of cyclic analog-to-digital converters (ADCs) and imaging quality of CMOS …

This paper presents a digital background calibration technique for pipelined analog-to-
digital converters (ADCs) to correct the gain error due to the capacitors mismatch and finite …

در این مقاله، یک روش کالیبراسیون دیجیتال برای اصلاح خطاهای مداری موجود در مبدل های آنالوگ به
دیجیتال Pipeline ارائه شده است. این روش شامل دو بخش است که در قسمت اول، یک تخمین اولیه و …‎