In recent years, there has been tremendous advances in hardware acceleration of deep
neural networks. However, most of the research has focused on optimizing accelerator …

With the prevalence of hardware accelerators as an integral part of the modern systems on
chip (SoCs), the ability to quickly and accurately model accelerators within the system it …

Accelerator design is expensive due to the effort required to understand an algorithm and
optimize the design. Architects have embraced two technologies to reduce costs. High-level …

In recent years there has been a surge of interest in designing custom accelerators for
power-efficient high-performance computing. However, available tools to simulate low-level …

With the prevalence of hardware accelerators as an integral part of the modern systems on
chip (SoCs), the ability to model accelerators quickly and accurately within the system in …

RISC-V is supported by a series of design and simulation tools that enable simple instruction
set customization and rapid exploration of application-specific accelerators. Evaluating the …

Recent years have seen an increasing trend in designing AI accelerators together with the
rest of the system, including CPUs and memory hierarchy. This trend calls for high-quality …

This paper describes a methodology to improve the energy efficiency of high‐performance
multiprocessor architectures with dynamic and partial reconfiguration (DPR), based on a …

The prevalence of custom Intellectual Properties (IPs) poses challenges for assessing their
system-level performance and functional behavior. Register Transfer Level (RTL) simulation …

Parallel computing systems based on reconfigurable accelerators are becoming (1)
increasingly heterogeneous,(2) difficult to design and (3) complex to model. Such modeling …