A review on compact modeling of multiple-gate MOSFETs
J Song, B Yu, Y Yuan, Y Taur - IEEE Transactions on Circuits …, 2009 - ieeexplore.ieee.org
This paper reviews recent development on compact modeling of multiple-gate (MG)
MOSFETs. Long-channel core models based on the analytical potential solutions of Poisson …
MOSFETs. Long-channel core models based on the analytical potential solutions of Poisson …
FinFET circuit design
P Mishra, A Muttreja, NK Jha - Nanoelectronic circuit design, 2011 - Springer
Fin-type field-effect transistors (FinFETs) are promising substitutes for bulk CMOS at the
nanoscale. FinFETs are double-gate devices. The two gates of a FinFET can either be …
nanoscale. FinFETs are double-gate devices. The two gates of a FinFET can either be …
Technology and modeling of nonclassical transistor devices
GV Angelov, DN Nikolov… - Journal of Electrical and …, 2019 - Wiley Online Library
This paper presents a comprehensive outlook for the current technology status and the
prospective upcoming advancements. VLSI scaling trends and technology advancements in …
prospective upcoming advancements. VLSI scaling trends and technology advancements in …
First demonstration of heterogeneous IGZO/Si CFET monolithic 3-D integration with dual work function gate for ultralow-power SRAM and RF applications
SW Chang, TH Lu, CY Yang, CJ Yeh… - … on Electron Devices, 2022 - ieeexplore.ieee.org
In this article, heterogeneous complementary field-effect-transistor (CFET) constructed by
vertically stacking amorphous indium gallium zinc oxide (a-IGZO) n-channel on poly-Si p …
vertically stacking amorphous indium gallium zinc oxide (a-IGZO) n-channel on poly-Si p …
Dual- Independent-Gate FinFETs for Low Power Logic Circuits
M Rostami, K Mohanram - IEEE Transactions on Computer …, 2011 - ieeexplore.ieee.org
This paper describes the electrode work-function, oxide thickness, gate-source/drain
underlap, and silicon thick ness optimization required to realize dual-V th independent-gate …
underlap, and silicon thick ness optimization required to realize dual-V th independent-gate …
Computationally efficient compact model for ferroelectric field-effect transistors to simulate the online training of neural networks
In this paper, a compact drain current formulation that is simple and adequately
computationally efficient for the simulation of neural network online training was developed …
computationally efficient for the simulation of neural network online training was developed …
[图书][B] Compact models for integrated circuit design: conventional transistors and beyond
SK Saha - 2015 - library.oapen.org
This modern treatise on compact models for circuit computer-aided design (CAD) presents
industry standard models for bipolar-junction transistors (BJTs), metal-oxide-semiconductor …
industry standard models for bipolar-junction transistors (BJTs), metal-oxide-semiconductor …
[图书][B] FinFET devices for VLSI circuits and systems
SK Saha - 2020 - taylorfrancis.com
To surmount the continuous scaling challenges of MOSFET devices, FinFETs have emerged
as the real alternative for use as the next generation device for IC fabrication technology …
as the real alternative for use as the next generation device for IC fabrication technology …
BSIM-CMG: A compact model for multi-gate transistors
MV Dunga, CH Lin, AM Niknejad, C Hu - FinFETs and Other Multi-Gate …, 2008 - Springer
This Chapter describes the physics behind the BSIM-CMG (Berkeley Short-channel IGFET
Model–Common Multi-Gate) compact models for multigate MOSFETs. A compact model …
Model–Common Multi-Gate) compact models for multigate MOSFETs. A compact model …
[图书][B] BSIM4 and MOSFET modeling for IC simulation
W Liu, C Hu - 2011 - books.google.com
This book presents the art of advanced MOSFET modeling for integrated circuit simulation
and design. It provides the essential mathematical and physical analyses of all the electrical …
and design. It provides the essential mathematical and physical analyses of all the electrical …