Sparse matrices are widely used in graph and data analytics, machine learning, engineering
and scientific applications. This paper describes and analyzes OuterSPACE, an accelerator …

This survey reviews the scientific literature on techniques for reducing interference in real-
time multicore systems, focusing on the approaches proposed between 2015 and 2020. It …

We propose LATR-lazy TLB coherence-a software-based TLB shootdown mechanism that
can alleviate the overhead of the synchronous TLB shootdown mechanism in existing …

Wearable devices are now leveraging multi-core processors to cater to the increasing
computational demands of the applications via multi-threading. However, the power …

Power‐efficient architectures have become the most important feature required for future
embedded systems. Modern designs, like those released on mobile devices, reveal that …

Sparse matrix operations are critical kernels in multiple application domains such as High
Performance Computing, artificial intelligence and big data. Vector processing is widely …

In the last few years, the traditional ways to keep the increase of hardware performance to
the rate predicted by the Moore's Law have vanished. When uni-cores were the norm …

The growing trend of pervasive computing has consolidated the everlasting need for power
efficient devices. The conventional cache subsystem of general-purpose CPUs, while being …

The increasing number of cores and the anticipated level of heterogeneity in upcoming
multicore architectures cause important problems in traditional cache hierarchies. A good …

Last-level caches (LLCs) bridge the processor/memory speed gap and reduce energy
consumed per access. Unfortunately, LLCs are poorly utilized because of the relatively large …