A hybrid SRAM/RRAM in-memory computing architecture based on a reconfigurable SRAM sense amplifier
In this paper, a hybrid memory architecture based on a new array of SRAM and resistive
random-access memory (RRAM) cells is proposed to perform in-memory computing by …
random-access memory (RRAM) cells is proposed to perform in-memory computing by …
A look-up table-based processing-in-SRAM architecture for energy-efficient search applications
This paper presents an efficient in-memory computing architecture for search and logic
function applications. The proposed design benefits from an SRAM cell, using two single …
function applications. The proposed design benefits from an SRAM cell, using two single …
An energy efficient in-memory computing architecture using reconfigurable magnetic logic circuits for big data processing
MA Gargari, N Eslami… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
In-memory computing (IMC) is considered one of the most promising candidates to solve the
nontraditional challenges conventional computing systems face in dealing with novel big …
nontraditional challenges conventional computing systems face in dealing with novel big …
Binary and ternary logic-in-memory using nanosheet feedback field-effect transistors with triple-gated structure
J Han, J Son, S Ryu, K Cho, S Kim - Scientific Reports, 2024 - nature.com
In this study, we demonstrate binary and ternary logic-in-memory (LIM) operations of
inverters and NAND and NOR gates comprising nanosheet (NS) feedback field-effect …
inverters and NAND and NOR gates comprising nanosheet (NS) feedback field-effect …
Compositional effects of hybrid MoS2–GO active layer on the performance of unipolar, low-power and multistate RRAM device
R Manikandan, G Raina - Nanotechnology, 2024 - iopscience.iop.org
Currently, 2D nanomaterials-based resistive random access memory (RRAMs) are explored
on account of their tunable material properties enabling fabrication of low power and flexible …
on account of their tunable material properties enabling fabrication of low power and flexible …
TiCoSb Heusler alloy-based magnetic tunnel junction for efficient computing in memory architecture
PB Alisha, TS Warrier - Journal of Computational Electronics, 2024 - Springer
Computing in memory (CiM) architecture enables computation within the memory array,
reducing power-intensive data transmission between the processor and memory. The …
reducing power-intensive data transmission between the processor and memory. The …
Computing in Memory Using Doubled STT-MRAM with the Application of Binarized Neural Networks
The computing-in-memory (CiM) approach is a promising option for addressing the
processor–memory data transfer bottleneck while performing data-intensive applications. In …
processor–memory data transfer bottleneck while performing data-intensive applications. In …
A look-up table-based processing-in-SRAM architecture for energy-efficient search applications
SH Hadi Nemati, N Eslami, MH Moaiyeri - 2023 - dl.acm.org
This paper presents an efficient in-memory computing architecture for search and logic
function applications. The proposed design benefits from an SRAM cell, using two single …
function applications. The proposed design benefits from an SRAM cell, using two single …