High-voltage SiC power devices for improved energy efficiency

T Kimoto - Proceedings of the Japan Academy, Series B, 2022 - jstage.jst.go.jp
Silicon carbide (SiC) power devices significantly outperform the well-established silicon (Si)
devices in terms of high breakdown voltage, low power loss, and fast switching. This review …

The road to a robust and affordable SiC power MOSFET technology

HLR Maddi, S Yu, S Zhu, T Liu, L Shi, M Kang, D Xing… - Energies, 2021 - mdpi.com
This article provides a detailed study of performance and reliability issues and trade-offs in
silicon carbide (SiC) power MOSFETs. The reliability issues such as threshold voltage …

A Critical review on reliability and short circuit robustness of silicon carbide power MOSFETs

S Sreejith, J Ajayan, SB Devasenapati, B Sivasankari… - Silicon, 2023 - Springer
Superior electrical and physical properties of SiC (Silicon Carbide) make them ideal for
various high voltage, high frequency and high power electronic applications. When …

Quantified density of performance-degrading near-interface traps in SiC MOSFETs

M Chaturvedi, S Dimitrijev, D Haasmann… - Scientific reports, 2022 - nature.com
Abstract Characterization of near-interface traps (NITs) in commercial SiC metal–oxide–
semiconductor field-effect transistors (MOSFETs) is essential because they adversely impact …

Mobility enhancement in heavily doped 4H-SiC (0001),(112̄0), and (11̄00) MOSFETs via an oxidation-minimizing process

K Tachiki, K Mikami, K Ito, M Kaneko… - Applied Physics …, 2022 - iopscience.iop.org
The effects of a process that minimizes oxidation of SiC on the channel mobility of heavily
doped 4H-SiC (0001),(11 bar 2 0) and (1 bar 1 00) metal-oxide-semiconductor field-effect …

Experimental determination of interface trap density and fixed positive oxide charge in commercial 4H-SiC power MOSFETs

S Yu, MH White, AK Agarwal - IEEE Access, 2021 - ieeexplore.ieee.org
We measure interface trap density near the conduction band edge and fixed oxide charge in
commercial, packaged, 4H-SiC 1.2 kV planar Power MOSFETs. These traps determine the …

−10 V Threshold Voltage High-Performance Normally-OFF C–Si Diamond MOSFET Formed by p+-Diamond-First and Silicon Molecular Beam Deposition …

Y Fu, Y Chang, S Kono, A Hiraiwa… - … on Electron Devices, 2022 - ieeexplore.ieee.org
In this article, the normally-OFF oxidized Si-terminated (C–Si) diamond metal–oxide–
semiconductor field-effect transistors (MOSFETs) with as-deposited 0.5-nm silicon on …

Impact of the NO annealing duration on the SiO2/4H–SiC interface properties in lateral MOSFETs: The energetic profile of the near-interface-oxide traps

P Fiorenza, M Zignale, M Camalleri, L Scalia… - Materials Science in …, 2024 - Elsevier
In this work, the effects of the duration of the post deposition annealing (PDA) in nitric oxide
(NO) on the properties of SiO 2/4H–SiC interfaces in n-channel lateral MOSFETs are …

Study of carrier mobilities in 4H-SiC MOSFETS using Hall analysis

S Das, Y Zheng, A Ahyi, MA Kuroda, S Dhar - Materials, 2022 - mdpi.com
The channel conduction in 4H-SiC metal–oxide–semiconductor field effect transistors
(MOSFETs) are highly impacted by charge trapping and scattering at the interface. Even …

[HTML][HTML] Impact of the oxidation temperature on the density of single-photon sources formed at SiO2/SiC interface

M Kaneko, H Takashima, K Shimazaki, S Takeuchi… - APL Materials, 2023 - pubs.aip.org
The impact of oxidation temperature on the formation of single photon-emitting defects
located at the silicon dioxide (SiO 2)/silicon carbide (SiC) interface was investigated …