Design and simulation of reliable low power CMOS logic gates
VK Sharma - IETE Journal of Research, 2023 - Taylor & Francis
In this paper, a circuit-level reliable low leakage design methodology is proposed for
integrated circuits (ICs). Low leakage circuit design is the most challenging research area for …
integrated circuits (ICs). Low leakage circuit design is the most challenging research area for …
Reconfigurable high performance architectures: How much are they ready for safety-critical applications?
D Sabena, L Sterpone, M Schölzel… - 2014 19th IEEE …, 2014 - ieeexplore.ieee.org
Reconfigurable architectures are increasingly employed in a large range of embedded
applications, mainly due to their ability to provide high performance and high flexibility …
applications, mainly due to their ability to provide high performance and high flexibility …
On-line dependability enhancement of multiprocessor SoCs by resource management
TD Ter Braak, ST Burgess… - … on System on Chip, 2010 - ieeexplore.ieee.org
This paper describes a new approach towards dependable design of homogeneous multi-
processor SoCs in an example satellite-navigation application. First, the NoC dependability …
processor SoCs in an example satellite-navigation application. First, the NoC dependability …
[PDF][PDF] Self-testing and self-repairing embedded processors: techniques for statically scheduled superscalar architectures
M Schölzel - 2014 - opus4.kobv.de
This thesis introduces a comprehensive approach for making a particular class of embedded
processors self-testing and self-repairing, such that a limited amount of permanent hardware …
processors self-testing and self-repairing, such that a limited amount of permanent hardware …
Diagnostic self-test for dynamically scheduled superscalar processors based on reconfiguration techniques for handling permanent faults
M Schölzel, T Koal, HT Vierhaus - 2014 IEEE International …, 2014 - ieeexplore.ieee.org
Diagnostic self-test in-the-field for processors becomes mandatory for reconfigurable fault
tolerant processor-based systems. Software-based self-test techniques are well suited for …
tolerant processor-based systems. Software-based self-test techniques are well suited for …
A dependability solution for homogeneous MPSoCs
X Zhang, HG Kerkhoff - 2011 IEEE 17th Pacific Rim …, 2011 - ieeexplore.ieee.org
Nowadays highly dependable electronic devices are demanded by many safety-critical
applications. Dependability attributes such as reliability and availability/maintainability of a …
applications. Dependability attributes such as reliability and availability/maintainability of a …
Software-based repair for memories in tiny embedded systems
M Schölzel, P Skoncej - 2015 20th IEEE European Test …, 2015 - ieeexplore.ieee.org
This paper presents a software-based technique for handling permanent manufacturing
faults in low-cost memories for tiny embedded systems. The technique is based on an …
faults in low-cost memories for tiny embedded systems. The technique is based on an …
Linking aging measurements of health-monitors and specifications for multi-processor SoCs
HG Kerkhoff, J Wan, Y Zhao - 2014 9th IEEE International …, 2014 - ieeexplore.ieee.org
A new generation of highly dependable multi-processor Systems-on-Chip for safety-critical
applications under harsh environments with zero down-time is emerging. In this paper 1, the …
applications under harsh environments with zero down-time is emerging. In this paper 1, the …
Power-dissipation comparison of two dependability approaches for multi-processor systems
Y Zhao, X Zhang, HG Kerkhoff - 2013 8th International …, 2013 - ieeexplore.ieee.org
The additional power dissipation involved in introducing a high dependability in multi-
processor systems is nowadays becoming a major concern (power-aware dependability). In …
processor systems is nowadays becoming a major concern (power-aware dependability). In …
A multi-layer software-based fault-tolerance approach for heterogenous multi-core systems
S Müller, T Koal, S Scharoba… - 2015 16th Latin …, 2015 - ieeexplore.ieee.org
This paper describes a software-based technique for building heterogeneous fault tolerant
multi-core systems, which are able to handle temporary and permanent hardware faults …
multi-core systems, which are able to handle temporary and permanent hardware faults …