Neural architecture search survey: A hardware perspective
KT Chitty-Venkata, AK Somani - ACM Computing Surveys, 2022 - dl.acm.org
We review the problem of automating hardware-aware architectural design process of Deep
Neural Networks (DNNs). The field of Convolutional Neural Network (CNN) algorithm design …
Neural Networks (DNNs). The field of Convolutional Neural Network (CNN) algorithm design …
Circuitnet: An open-source dataset for machine learning in vlsi cad applications with improved domain-specific evaluation metric and learning strategies
The design automation community has been actively exploring machine learning (ML) for
very-large-scale-integrated (VLSI) computer-aided design (CAD). Many studies have …
very-large-scale-integrated (VLSI) computer-aided design (CAD). Many studies have …
Large circuit models: opportunities and challenges
Within the electronic design automation (EDA) domain, artificial intelligence (AI)-driven
solutions have emerged as formidable tools, yet they typically augment rather than redefine …
solutions have emerged as formidable tools, yet they typically augment rather than redefine …
The dawn of ai-native eda: Promises and challenges of large circuit models
Within the Electronic Design Automation (EDA) domain, AI-driven solutions have emerged
as formidable tools, yet they typically augment rather than redefine existing methodologies …
as formidable tools, yet they typically augment rather than redefine existing methodologies …
Lay-Net: Grafting Netlist Knowledge on Layout-Based Congestion Prediction
Congestion modeling is a key point for improving the routability of VLSI placement solutions.
The underuti-lization of netlist information limits the performance of ex-isting layout-based …
The underuti-lization of netlist information limits the performance of ex-isting layout-based …
Towards collaborative intelligence: Routability estimation based on decentralized private data
Applying machine learning (ML) in design flow is a popular trend in Electronic Design
Automation (EDA) with various applications from design quality predictions to optimizations …
Automation (EDA) with various applications from design quality predictions to optimizations …
Mitigating distribution shift for congestion optimization in global placement
The placement and routing (PnR) flow plays a critical role in physical design. Poor routing
congestion is a possible problem causing severe routing detours, which can lead to …
congestion is a possible problem causing severe routing detours, which can lead to …
Rethink before releasing your model: ML model extraction attack in EDA
Machine learning (ML)-based techniques for electronic design automation (EDA) have
boosted the performance of modern integrated circuits (ICs). Such achievement makes ML …
boosted the performance of modern integrated circuits (ICs). Such achievement makes ML …
A stochastic approach to handle non-determinism in deep learning-based design rule violation predictions
Deep learning is a promising approach to early DRV (Design Rule Violation) prediction.
However, non-deterministic parallel routing hampers model training and degrades …
However, non-deterministic parallel routing hampers model training and degrades …
Layout Congestion Prediction Based on Regression-ViT
G Mo, Y Xia, J Ou, S Cai, X Xiong - ACM Transactions on Design …, 2024 - dl.acm.org
To accelerate the back-end design flow of integrated circuit (IC), numerous studies have
made exploratory advancements in machine learning (ML) for electronic design automation …
made exploratory advancements in machine learning (ML) for electronic design automation …