Remanence decay side-channel: The PUF case
S Zeitouni, Y Oren, C Wachsmann… - IEEE Transactions …, 2015 - ieeexplore.ieee.org
We present a side-channel attack based on remanence decay in volatile memory and show
how it can be exploited effectively to launch a noninvasive cloning attack against SRAM …
how it can be exploited effectively to launch a noninvasive cloning attack against SRAM …
27.8 A static contention-free single-phase-clocked 24T flip-flop in 45nm for low-power applications
Near-threshold computing (NTC) is an attractive solution to stagnating energy efficiencies in
digital integrated circuits, arising from slowed voltage scaling in nanometer CMOS [1-2]. The …
digital integrated circuits, arising from slowed voltage scaling in nanometer CMOS [1-2]. The …
Sense-amplifier-based flip-flop with transition completion detection for low-voltage operation
H Jeong, TW Oh, SC Song… - IEEE Transactions on Very …, 2018 - ieeexplore.ieee.org
A novel high-speed and highly reliable sense-amplifier-based flip-flop with transition
completion detection (SAFF-TCD) is proposed for low supply voltage (V DD) operation. The …
completion detection (SAFF-TCD) is proposed for low supply voltage (V DD) operation. The …
Low-power near-threshold design: Techniques to improve energy efficiency energy-efficient near-threshold design has been proposed to increase energy efficiency …
N Pinckney, D Blaauw… - IEEE Solid-State Circuits …, 2015 - ieeexplore.ieee.org
Energy-efficient near-threshold design has been proposed to increase energy efficiency
across a wide range of applications. This article first provides a background motivating near …
across a wide range of applications. This article first provides a background motivating near …
Characterization of PVT variation & aging induced hold time margins of flip-flop arrays at NTV in 22nm tri-gate CMOS
C Augustine, C Tokunaga, A Malavasi… - 2016 IEEE …, 2016 - ieeexplore.ieee.org
With increasing process variation in scaled technology nodes along with voltage and
temperature variations and aging degradations, critical timing circuits are impacted which …
temperature variations and aging degradations, critical timing circuits are impacted which …
A High-Speed Sense Amplifier Based Flip Flop with a Single Ended Latch Design and Low Voltage Operating Capabilities
MA Khan, MK Singh, A Upadhyay - 2023 3rd International …, 2023 - ieeexplore.ieee.org
This paper presents a sense amplifier-based flip flop (SAFF) with low power and high-speed
operation capabilities. The power consumption and delay of FF improved after using the …
operation capabilities. The power consumption and delay of FF improved after using the …
Case Study and Analysis to Improve Power Gating Feature in SoC
CV Reddy, GK Singh, D Rawat, P Vikas… - 2023 7th …, 2023 - ieeexplore.ieee.org
This paper focuses on the study of impedance profiles of Intel SoC:'s packaging options and
their impact on V min. In previous generations, provisions were made to short power gates in …
their impact on V min. In previous generations, provisions were made to short power gates in …
Low-Power and Error-Resilient VLSI Circuits and Systems.
CH Chen - 2014 - deepblue.lib.umich.edu
Efficient low-power operation is critically important for the success of the next-generation
signal processing applications. Device and supply voltage have been continuously scaled to …
signal processing applications. Device and supply voltage have been continuously scaled to …
Ultra-low-power sequential circuit design for near-threshold voltage system
Y Cai - 2019 - eprints.soton.ac.uk
Near-Threshold Voltage (NTV) techniques have been demonstrated to reduce energy
consumption significantly by decreasing the supply voltage approaching the threshold …
consumption significantly by decreasing the supply voltage approaching the threshold …
High sigma statistical hold time analysis in FinFET sequential circuits
SC Lo, TT Lee, AJ Barker - 2017 18th International Symposium …, 2017 - ieeexplore.ieee.org
Accurate hold time analysis of sequential cells is crucial to high performance enterprise
server microprocessor circuit design. Due to tight timing margins, process variation, and …
server microprocessor circuit design. Due to tight timing margins, process variation, and …