[HTML][HTML] Applications and techniques for fast machine learning in science

AMC Deiana, N Tran, J Agar, M Blott… - Frontiers in big …, 2022 - frontiersin.org
In this community review report, we discuss applications and techniques for fast machine
learning (ML) in science—the concept of integrating powerful ML methods into the real-time …

Pushing the level of abstraction of digital system design: A survey on how to program fpgas

ED Sozzo, D Conficconi, A Zeni, M Salaris… - ACM Computing …, 2022 - dl.acm.org
Field Programmable Gate Arrays (FPGAs) are spatial architectures with a heterogeneous
reconfigurable fabric. They are state-of-the-art for prototyping, telecommunications …

A survey and evaluation of FPGA high-level synthesis tools

R Nane, VM Sima, C Pilato, J Choi… - … on Computer-Aided …, 2015 - ieeexplore.ieee.org
High-level synthesis (HLS) is increasingly popular for the design of high-performance and
energy-efficient heterogeneous systems, shortening time-to-market and addressing today's …

P4fpga: A rapid prototyping framework for p4

H Wang, R Soulé, HT Dang, KS Lee… - Proceedings of the …, 2017 - dl.acm.org
This paper presents P4FPGA, a new tool for developing and evaluating data plane
applications. P4FPGA is an open-source compiler and runtime. The compiler extends the …

The p4-> netfpga workflow for line-rate packet processing

S Ibanez, G Brebner, N McKeown… - Proceedings of the 2019 …, 2019 - dl.acm.org
P4 has emerged as the de facto standard language for describing how network packets
should be processed, and is becoming widely used by network owners, systems developers …

The case for in-network computing on demand

Y Tokusashi, HT Dang, F Pedone, R Soulé… - Proceedings of the …, 2019 - dl.acm.org
Programmable network hardware can run services traditionally deployed on servers,
resulting in orders-of-magnitude improvements in performance. Yet, despite these …

A compiler infrastructure for accelerator generators

R Nigam, S Thomas, Z Li, A Sampson - Proceedings of the 26th ACM …, 2021 - dl.acm.org
We present Calyx, a new intermediate language (IL) for compiling high-level programs into
hardware designs. Calyx combines a hardware-like structural language with a software-like …

Sorting networks on FPGAs

R Mueller, J Teubner, G Alonso - The VLDB Journal, 2012 - Springer
Computer architectures are quickly changing toward heterogeneous many-core systems.
Such a trend opens up interesting opportunities but also raises immense challenges since …

Lime: a java-compatible and synthesizable language for heterogeneous architectures

J Auerbach, DF Bacon, P Cheng… - Proceedings of the ACM …, 2010 - dl.acm.org
The halt in clock frequency scaling has forced architects and language designers to look
elsewhere for continued improvements in performance. We believe that extracting maximum …

Data processing on FPGAs

R Mueller, J Teubner, G Alonso - Proceedings of the VLDB Endowment, 2009 - dl.acm.org
Computer architectures are quickly changing toward heterogeneous many-core systems.
Such a trend opens up interesting opportunities but also raises immense challenges since …