A digital background calibration method for a current-steering digital-to-analog converter
(DAC) is presented. The algorithm uses one comparator for calibration and corrects for …

CMOS technology scaling has enabled dramatic improvement for digital circuits both in
terms of digital speed and power efficiency. However, most traditional analog-to-digital …

Capacitor mismatch and finite op-amp gain are two main error sources for high-resolution
pipelined ADCs. This paper presents a high-efficiency digital calibration technique for multi …

Chip makers suffer from the performance degradation of pipelined ADCs, due to the
capacitance mismatch issue from their manufacturing process. This work proposes an …

A transfer characteristic shift technique has been proposed in this paper. By shifting the
transfer characteristic of the sub-stage under calibration in pipelined ADC, a full input range …