Fine-grained access management in reconfigurable scan networks
R Baranowski, MA Kochte… - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
Modern very large scale integration designs incorporate a high amount of instrumentation
that supports post-silicon validation and debug, volume test and diagnosis, as well as in …
that supports post-silicon validation and debug, volume test and diagnosis, as well as in …
A suite of IEEE 1687 benchmark networks
The saturation of the IJTAG concept and its approval as the IEEE 1687 standard in 2014 has
generated a wave of research activities and created demand for a set of appropriate and …
generated a wave of research activities and created demand for a set of appropriate and …
Specification and verification of security in reconfigurable scan networks
A large amount of on-chip infrastructure, such as design-for-test, debug, monitoring, or
calibration, is required for the efficient manufacturing, debug, and operation of complex …
calibration, is required for the efficient manufacturing, debug, and operation of complex …
Access port protection for reconfigurable scan networks
Scan infrastructures based on IEEE Std. 1149.1 (JTAG), 1500 (SECT), and P1687 (IJTAG)
provide a cost-effective access mechanism for test, reconfiguration, and debugging …
provide a cost-effective access mechanism for test, reconfiguration, and debugging …
Trustworthy reconfigurable access to on-chip infrastructure
MA Kochte, R Baranowski… - 2017 International Test …, 2017 - ieeexplore.ieee.org
The accessibility of on-chip embedded infrastructure for test, reconfiguration, or debug
poses a serious security problem. Access mechanisms based on IEEE Std 1149.1 (JTAG) …
poses a serious security problem. Access mechanisms based on IEEE Std 1149.1 (JTAG) …
Security against data-sniffing and alteration attacks in IJTAG
R Elnaggar, R Karri… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
The IEEE Std. 1687 (IJTAG) facilitates access to on-chip instruments in complex system-on-
chip designs. However, a major security vulnerability in IJTAG has yet to be addressed …
chip designs. However, a major security vulnerability in IJTAG has yet to be addressed …
On secure data flow in reconfigurable scan networks
P Raiola, B Thiemann, J Burchard… - … , Automation & Test …, 2019 - ieeexplore.ieee.org
Reconfigurable Scan Networks (RSNs) allow flexible access to embedded instruments for
post-silicon test, validation and debug or diagnosis. The increased observability and …
post-silicon test, validation and debug or diagnosis. The increased observability and …
Securing IJTAG against data-integrity attacks
R Elnaggar, R Karri… - 2018 IEEE 36th VLSI Test …, 2018 - ieeexplore.ieee.org
The IEEE Std. 1687 (IJTAG) facilitates access to on-chip instruments in complex system-on-
chip designs. However, a major security vulnerability in IJTAG has yet to be addressed …
chip designs. However, a major security vulnerability in IJTAG has yet to be addressed …
Detecting and resolving security violations in reconfigurable scan networks
P Raiola, MA Kochte, A Atteya… - 2018 IEEE 24th …, 2018 - ieeexplore.ieee.org
Reconfigurable Scan Networks (RSNs) allow flexible access to embedded instruments for
post-silicon validation and debug or diagnosis. However, this scan infrastructure can also be …
post-silicon validation and debug or diagnosis. However, this scan infrastructure can also be …
Online prevention of security violations in reconfigurable scan networks
Modern systems-on-chip (SoC) designs are requiring more and more infrastructure for
validation, debug, volume test as well as in-field maintenance and repair. Reconfigurable …
validation, debug, volume test as well as in-field maintenance and repair. Reconfigurable …