A survey of techniques for energy efficient on-chip communication

V Raghunathan, MB Srivastava, RK Gupta - Proceedings of the 40th …, 2003 - dl.acm.org
Interconnects have been shown to be a dominant source of energy consumption in modern
day System-on-Chip (SoC) designs. With a large (and growing) number of electronic …

[PDF][PDF] Adiabatic logic circuits: a retrospect

D Shinghal, A Saxena, A Noor - MIT International Journal of …, 2013 - researchgate.net
With ever-increasing growth in VLSI technologies the number of gates per chip area is
constantly increasing, while the gate switching energy does not decrease at the same rate …

QSERL: Quasi-static energy recovery logic

Y Ye, K Roy - IEEE Journal of Solid-State Circuits, 2001 - ieeexplore.ieee.org
A new quasi-static energy recovery logic family (QSERL) using the principle of adiabatic
switching is proposed in this paper. Most of the previously proposed adiabatic logic styles …

True single-phase adiabatic circuitry

S Kim, MC Papaefthymiou - IEEE Transactions on Very Large …, 2001 - ieeexplore.ieee.org
Dynamic logic families that rely on energy recovery to achieve low energy dissipation control
the flow of data through gate cascades using multiphase clocks. Consequently, they typically …

A review on energy efficient CMOS digital logic

BL Dokic - Engineering, Technology & Applied Science Research, 2013 - etasr.com
Autonomy of power supply used in portable devices directly depends on energy efficiency of
digital logic. This means that digital systems, beside high processing power and very …

Low power adiabatic logic based on FinFETs

N Liao, XX Cui, K Liao, KS Ma, D Wu, W Wei… - Science China …, 2014 - Springer
With the aggressive scaling of device technology, the leakage power has become the main
part of power consumption, which seriously reduces the energy recovery efficiency of …

Charge-recovery computing on silicon

S Kim, CH Ziesler… - IEEE Transactions on …, 2005 - ieeexplore.ieee.org
Three decades ago, theoretical physicists suggested that the controlled recovery of charges
could result in electronic circuitry whose power dissipation approaches thermodynamic …

Pass-transistor adiabatic logic with NMOS pull-down configuration

F Liu, KT Lau - Electronics Letters, 1998 - IET
A new low power adiabatic logic family, pass-transistor adiabatic logic with NMOS pull-down
configuration, is presented. For a 2: 1 multiplexer, a power saving of~ 80% is achieved …

Analysis and Design of an Efficient Irreversible Energy Recovery Logic in 0.18-m CMOS

CSA Gong, MT Shiue, CT Hong… - IEEE Transactions on …, 2008 - ieeexplore.ieee.org
This paper presents the design and experimental evaluation of a new type of irreversible
energy recovery logic (ERL) families called complementary energy path adiabatic logic …

Analysis of sub-threshold adiabatic logic model using junctionless MOSFET for low power application

S Roy, G Jana, M Chanda - Silicon, 2022 - Springer
Abstract In this paper Junctionless Double Gate MOSFET based Efficient Charge Recovery
Logic (JL-ECRL) circuits have been driven in sub-threshold regime for the first time in …